SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 142

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug Interface and EmbeddedICE-RT
7.2.2
7.2.3
7-4
The protocol converter
The ARM9E-S
An interface, such as an RS232 or parallel connection, connects the debug host to the
ARM9E-S development system. The messages broadcast over this connection must be
converted to the interface signals of the ARM9E-S. The protocol converter performs
this conversion.
The ARM9E-S has hardware extensions that ease debugging at the lowest level. The
debug extensions:
•
•
•
•
The major blocks of the ARM9E-S are:
ARM9E-S core
EmbeddedICE-RT logic
TAP controller
These blocks are shown in Figure 7-2 on page 7-5.
allow you to stall program execution by the core
examine the core internal state
examine the state of the memory system
resume program execution.
Copyright © 2000 ARM Limited. All rights reserved.
This is the CPU core, with hardware support for debug.
This is a set of registers and comparators used to generate debug
exceptions (such as breakpoints). This unit is described in About
EmbeddedICE-RT on page 7-6.
This controls the action of the scan chains using a JTAG serial
interface.
ARM DDI 0165B