SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 790

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

38.11.5
Name:
Address:
Access:
Reset:
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
790
790
T
T
low
high
=
=
31
23
15
–
7
CLDIV
CHDIV
SAM9G35
SAM9G35
TWI Clock Waveform Generator Register
TWI_CWGR
0xF8010010 (0), 0xF8014010 (1), 0xF8018010 (2)
Read-write
0x00000000
2
2
CKDIV
CKDIV
30
22
14
–
6
+
+
4
4
T
T
MCK
MCK
29
21
13
–
5
28
20
12
–
4
CHDIV
CLDIV
27
19
11
–
3
26
18
10
–
2
CKDIV
25
17
–
9
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
24
16
–
8
0