SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 769

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 38-17. TWI Write Operation with Multiple Data Bytes with or without Internal Address
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
TWI_THR = data to send
Yes
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Internal address size = 0?
Write ==> bit MREAD = 0
TWI_THR = Data to send
Write STOP Command
Set the Control register:
- Device slave address
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
- Master enable
TXCOMP = 1?
Yes
Data to send?
Yes
Set TWI clock
TXRDY = 1?
Yes
BEGIN
END
(if IADR used)
No
No
No
Set the internal address
TWI_IADR = address
SAM9G35
SAM9G35
769
769