SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 342

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 27-6. Read Operation
27.4.2.3
342
342
Remainder computation enable signal
Read NAND operation with SPAREEN set to Zero and AUTO set to One
512 or 1024 bytes
SAM9G35
SAM9G35
MLC/SLC User Read ECC Area
Sector 0
When AUTO field is set to one the ECC is retrieved automatically, otherwise the ECC must be
read using user mode.
This mode allows a manual retrieve of the ECC.
This mode is entered writing one in the USER field of the PMECC_CTRL register.
Figure 27-7. User Read Mode
Sector 1
pagesize = n * sectorsize
Partial Syndrome computation enable signal
addr = 0
Sector 2
ecc_area_size
ecc_area
ECC
Sector 3
end_addr
start_addr
ecc_area
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
sparesize
Spare
end_addr

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