SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 30

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

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SAM9G35
SAM9G35
• Write Buffer
• DCache Write-back Buffer
• Memory Management Unit (MMU)
• Memory Access
• Bus Interface Unit
– Write-though and Write-back Operation for DCache Only
– Pseudo-random or Round-robin Replacement
– Cache Lockdown Registers
– Cache Maintenance
– 16-word Data Buffer
– 4-address Address Buffer
– Software Control Drain
– 8 Data Word Entries
– One Address Entry
– Software Control Drain
– Access Permission for Sections
– Access Permission for Large Pages and Small Pages
– 16 Embedded Domains
– 64 Entry Instruction TLB and 64 Entry Data TLB
– 8-, 16-, and 32-bit Data Types
– Separate AMBA AHB Buses for Both the 32-bit Data Interface and the 32-bit
– Arbitrates and Schedules AHB Requests
– Enables Multi-layer AHB to be Implemented
– Increases Overall Bus Bandwidth
– Makes System Architecture Mode Flexible
Instructions Interface
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11