SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 567

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

33.7.1
Name:
Address:
Access:
• DEV_ADDR: UDPHS Address
This field contains the default address (0) after power-up or UDPHS bus reset (read), or it is written with the value set by a
SET_ADDRESS request received by the device firmware (write).
• FADDR_EN: Function Address Enable
0 = Device is not in address state (read), or only the default function address is used (write).
1 = Device is in address state (read), or this bit is set by the device firmware after a successful status phase of a
SET_ADDRESS transaction (write). When set, the only address accepted by the UDPHS controller is the one stored in the
UDPHS Address field. It will not be cleared afterwards by the device firmware. It is cleared by hardware on hardware reset,
or when UDPHS bus reset is received.
• EN_UDPHS: UDPHS Enable
0 = UDPHS is disabled (read), or this bit disables and resets the UDPHS controller (write). Switch the host to UTMI..
1 = UDPHS is enabled (read), or this bit enables the UDPHS controller (write). Switch the host to UTMI.
• DETACH: Detach Command
0 = UDPHS is attached (read), or this bit pulls up the DP line (attach command) (write).
1 = UDPHS is detached, UTMI transceiver is suspended (read), or this bit simulates a detach on the UDPHS line and
forces the UTMI transceiver into suspend state (Suspend M = 0) (write).
See PULLD_DIS description below.
•
0 = Remote Wake Up is disabled (read), or this bit has no effect (write).
1 = Remote Wake Up is enabled (read), or this bit forces an external interrupt on the UDPHS controller for Remote Wake
UP purposes.
An Upstream Resume is sent only after the UDPHS bus has been in SUSPEND state for at least 5 ms.
This bit is automatically cleared by hardware at the end of the Upstream Resume.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
FADDR_EN
REWAKEUP
31
23
15
–
–
–
7
UDPHS Control Register
: Send Remote Wake Up
UDPHS_CTRL
0xF803C000
Read-write
30
22
14
–
–
–
6
29
21
13
–
–
–
5
28
20
12
–
–
–
4
PULLD_DIS
DEV_ADDR
27
19
11
–
–
3
REWAKEUP
26
18
10
–
–
2
DETACH
25
17
–
–
9
1
SAM9G35
SAM9G35
EN_UDPHS
24
16
–
–
8
0
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