ATtiny461 Automotive Atmel Corporation, ATtiny461 Automotive Datasheet - Page 122

• Manufacturer Part Number: ATtiny461 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny461 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.11.5
122
ATtiny261/ATtiny461/ATtiny861
TCCR1E – Timer/Counter1 Control Register E
• Bit 3 - FPAC1: Fault Protection Analog Comparator Enable
When written logic one, this bit enables the Fault Protection function in Timer/Counter1 to be
triggered by the Analog Comparator. The comparator output is in this case directly connected to
the Fault Protection front-end logic, making the comparator utilize the noise canceler and edge
select features of the Timer/Counter1 Fault Protection interrupt. When written logic zero, no con-
nection between the Analog Comparator and the Fault Protection function exists. To make the
comparator trigger the Timer/Counter1 Fault Protection interrupt, the FPIE1 bit in the
Timer/Counter1 Control Register D (TCCR1D) must be set.
• Bit 2- FPF1: Fault Protection Interrupt Flag
When the FPIE1 bit is set (one), the Fault Protection Interrupt is enabled. Activity on the pin will
cause an interrupt request even, if the Fault Protection pin is configured as an output. The corre-
sponding interrupt of Fault Protection Interrupt Request is executed from the Fault Protection
Interrupt Vector. The bit FPF1 is cleared by hardware when executing the corresponding inter-
rupt handling vector. Alternatively, FPF1 is cleared after a synchronization clock cycle by writing
a logical one to the flag. When the SREG I-bit, FPIE1 and FPF1 are set, the Fault Interrupt is
executed.
• Bits 1:0 - WGM11, WGM10: Waveform Generation Mode Bits
This bit associated with the PWMx bits control the counting sequence of the counter, the source
for type of waveform generation to be used, see
the Timer/Counter1 are: Normal mode (counter), Fast PWM Mode, Phase and Frequency Cor-
rect PWM and PWM6 Modes.
Table 16-19. Waveform Generation Mode Bit Description
• Bits 7:6 - Res: Reserved Bits
These bits are reserved bits in the ATtiny261/461/861 and always reads as zero.
• Bits 5:0 – OC1OE5:OC1OE0: Output Compare Override Enable Bits
These bits are the Output Compare Override Enable bits that are used to connect or disconnect
the Output Compare Pins in PWM6 Modes with an instant response on the corresponding Out-
put Compare Pins.
Bit
0x00 (0x20)
Read/Write
Initial value
PWM1x
0
1
1
1
1
WGM11..10 Timer/Counter Mode of Operation
00
01
10
11
xx
R
7
0
-
Normal
Fast PWM
Phase and Frequency Correct PWM
PWM6 / Single-slope
PWM6 / Dual-slope
R
6
0
-
OC1OE5
R/W
5
0
OC1OE4
R/W
4
0
Table
OC1OE3
R/W
3
0
16-19. Modes of operation supported by
OC1OE2
TOP
OCR1C
OCR1C
OCR1C
OCR1C
OCR1C
R/W
0
2
OC1OE1
R/W
Update of
OCR1x at
Immediate
TOP
BOTTOM
TOP
BOTTOM
1
0
OC1OE0
R/W
0
0
7753F–AVR–01/11
TOP
TOP
BOTTOM
TOV1 Flag
Set on
TOP
BOTTOM
TCCR1E