ATtiny461 Automotive Atmel Corporation, ATtiny461 Automotive Datasheet - Page 109

• Manufacturer Part Number: ATtiny461 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny461 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.8
7753F–AVR–01/11
Timer/Counter Timing Diagrams
Table 16-5.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
Figure 16-14
sequence close to the MAX value in all modes other than Phase and Frequency Correct PWM
Mode.
other than Phase and Frequency Correct PWM Mode.
OCF1A, OCF1B and OCF1D in all modes, and
Phase and Frequency Correct PWM Mode.
Figure 16-14. Timer/Counter Timing Diagram, no Prescaling
TCNTn
(clk
TOVn
COM1A1
0
0
1
1
COM1B1
0
0
1
1
COM1D1
0
0
1
1
clk
clk
PCK
PCK
Tn
/1)
Figure 16-15
contains timing data for basic Timer/Counter operation. The figure shows the count
Output Compare Pin configurations in PWM6 Mode
COM1A0
0
1
0
1
COM1B0
0
1
0
1
COM1D0
0
1
0
1
TOP - 1
shows the same timing data, but with the prescaler enabled, in all modes
ATtiny261/ATtiny461/ATtiny861
OC1A Pin (PB0)
Disconnected
OC1A •
OC1A •
OC1A •
OC1B Pin (PB2)
Disconnected
OC1A •
OC1A •
OC1A •
OC1D Pin (PB4)
Disconnected
OC1A •
OC1A •
OC1A •
TOP
OC1OE0
OC1OE0
OC1OE0
OC1OE2
OC1OE2
OC1OE2
OC1OE4
OC1OE4
OC1OE4
Figure 16-17
BOTTOM
Figure 16-16
shows the setting of TOV1 in
OC1A Pin (PB1)
Disconnected
OC1A •
OC1A •
OC1A •
OC1B Pin (PB3)
Disconnected
OC1A •
OC1A •
OC1A •
OC1D Pin (PB5)
Disconnected
OC1A •
OC1A •
OC1A •
T1
) is therefore shown as a
shows the setting of
OC1OE1
OC1OE1
OC1OE1
OC1OE3
OC1OE3
OC1OE3
OC1OE5
OC1OE5
OC1OE5
BOTTOM + 1
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