ATmega162 Atmel Corporation, ATmega162 Datasheet - Page 95

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ATmega162

Manufacturer Part Number
ATmega162
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega162

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
35
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
6
Input Capture Channels
2
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Fast PWM Mode
2513K–AVR–07/09
Figure 37. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCF0 Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating the
TOP value. However, changing TOP to a value close to BOTTOM when the counter is running
with none or a low prescaler value must be done with care since the CTC mode does not have
the double buffering feature. If the new value written to OCR0 is lower than the current value of
TCNT0, the counter will miss the Compare Match. The counter will then have to count to its max-
imum value (0xFF) and wrap around starting at 0x00 before the Compare Match can occur.
For generating a waveform output in CTC mode, the OC0 output can be set to toggle its logical
level on each Compare Match by setting the Compare Output mode bits to toggle bitmode
(COM01:0 = 1). The OC0 value will not be visible on the port pin unless the data direction for the
pin is set to output. The waveform generated will have a maximum frequency of f
when OCR0 is set to zero (0x00). The waveform frequency is defined by the following equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
As for the Normal mode of operation, the TOV0 Flag is set in the same timer clock cycle that the
counter counts from MAX to 0x00.
The fast Pulse Width Modulation or fast PWM mode (WGM01:0 = 3) provides a high frequency
PWM waveform generation option. The fast PWM differs from the other PWM option by its sin-
gle-slope operation. The counter counts from BOTTOM to MAX then restarts from BOTTOM. In
non-inverting Compare Output mode, the Output Compare (OC0) is cleared on the Compare
Match between TCNT0 and OCR0, and set at BOTTOM. In inverting Compare Output mode, the
output is set on Compare Match and cleared at BOTTOM. Due to the single-slope operation, the
operating frequency of the fast PWM mode can be twice as high as the phase correct PWM
mode that use dual-slope operation. This high frequency makes the fast PWM mode well suited
for power regulation, rectification, and DAC applications. High frequency allows physically small
sized external components (coils, capacitors), and therefore reduces total system cost.
In fast PWM mode, the counter is incremented until the counter value matches the MAX value.
The counter is then cleared at the following timer clock cycle. The timing diagram for the fast
PWM mode is shown in
gram for illustrating the single-slope operation. The diagram includes non-inverted and inverted
PWM outputs. The small horizontal line marks on the TCNT0 slopes represent compare
matches between OCR0 and TCNT0.
TCNTn
OCn
(Toggle)
Period
Figure
1
38. The TCNT0 value is in the timing diagram shown as a histo-
f
OCn
=
2
---------------------------------------------- -
2 N
f
(
clk_I/O
1
3
+
OCRn
)
4
ATmega162/V
OCn Interrupt Flag Set
(COMn1:0 = 1)
OC
0 = f
clk_I/O
95
/2

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