ATmega162 Atmel Corporation, ATmega162 Datasheet - Page 210

• Manufacturer Part Number: ATmega162
• Manufacturer: Atmel Corporation

Specifications of ATmega162

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 6
• Input Capture Channels: 2
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Scanning the RESET
pin
210
ATmega162/V
Figure 88. General Port Pin Schematic Diagram
The RESET pin accepts 5V active low logic for standard reset operation, and 12V active high
logic for high voltage parallel programming. An observe-only cell as shown in
inserted both for the 5V reset signal; RSTT, and the 12V reset signal; RSTHV.
Figure 89. Observe-only Cell
From System Pin
See Boundary-Scan Description
Pxn
for Details!
PUD:
PUExn:
OCxn:
ODxn:
IDxn:
SLEEP:
IDxn
Previous
PULLUP DISABLE
PULLUP ENABLE for pin Pxn
OUTPUT CONTROL for pin Pxn
OUTPUT DATA to pin Pxn
INPUT DATA from pin Pxn
SLEEP CONTROL
From
Cell
PUExn
ShiftDR
0
1
ClockDR
SLEEP
OCxn
ODxn
D
SYNCHRONIZER
FF1
WDx:
RDx:
WRx:
RRx:
RPx:
CLK
D
L
Q
Q
Q
I/O
:
Next
Cell
To
D
WRITE DDRx
READ DDRx
WRITE PORTx
READ PORTx REGISTER
READ PORTx PIN
I/O CLOCK
PINxn
Q
Q
RESET
RESET
Q
Q
Q
PORTxn
Q
DDxn
CLR
CLR
D
D
To System Logic
CLK
PUD
WRx
WDx
RDx
RRx
RPx
I/O
2513K–AVR–07/09
Figure 89
is