ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 315

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.9.11
8151H–AVR–02/11
4. Set bits to “0” to program the corresponding lock bit, “1” to leave the Lock bit unchanged.
5. “0” = programmed, “1” = unprogrammed.
6. The bit mapping for Fuses Extended byte is listed in
7. The bit mapping for Fuses High byte is listed in
8. The bit mapping for Fuses Low byte is listed in
9. The bit mapping for Lock bits byte is listed in
10. Address bits exceeding PCMSB and EEAMSB
Virtual Flash Page Load Register
Figure 26-12. State Machine Sequence for Changing/Reading the Data Word
The Virtual Flash Page Load Register is a virtual scan chain with length equal to the number of
bits in one Flash page. Internally the Shift Register is 8-bit, and the data are automatically trans-
ferred to the Flash page buffer byte by byte. Shift in all instruction words in the page, starting
with the LSB of the first instruction in the page and ending with the MSB of the last instruction in
the page. This provides an efficient way to load the entire Flash page buffer before executing
Page Write.
1
0
Test-Logic-Reset
Run-Test/Idle
0
Table 26-1 on page 291
1
Table 26-5 on page 293
(Table 26-10
Table 26-4 on page 292
Table 26-3 on page 292
1
0
and
Select-DR Scan
Capture-DR
Table
Update-DR
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
1
0
0
1
0
1
1
26-11) are don’t care
0
1
1
0
0
1
0
ATmega128A
Select-IR Scan
Capture-IR
Update-IR
Pause-IR
Exit1-IR
Exit2-IR
Shift-IR
1
0
0
1
0
1
1
0
1
1
0
0
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