ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 18

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7. Memories
7.1
8151H–AVR–02/11
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the Atmel
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega128A features an EEPROM Memory for data storage. All three memory
spaces are linear and regular.
The ATmega128A contains 128Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 bits or 32 bits wide, the Flash is organized as
64K × 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega128A
Program Counter (PC) is 16 bits wide, thus addressing the 64K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in
277.
in SPI, JTAG, or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory and ELPM – Extended Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
“Memory Programming” on page 291
14.
Program Memory Map
“Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
Program Memory
contains a detailed description on Flash programming
®
AVR
$0000
$FFFF
®
ATmega128A. The AVR archi-
“Instruction Execution Tim-
ATmega128A
18