ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 209

no-image

ATmega128A

Manufacturer Part Number
ATmega128A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega128A

Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATmega128A XC6SLXFGG484CTV BCM7366ZBK W2SG0008I-T
Manufacturer:
XILINX
0
Part Number:
ATmega128A-16AU
Manufacturer:
ATMEL
Quantity:
6
Part Number:
ATmega128A-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega128A-16AU
Quantity:
100
Part Number:
ATmega128A-16MU
Quantity:
10
Part Number:
ATmega128A-AN
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega128A-ANR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega128A-AU
Manufacturer:
ATMEL
Quantity:
9 000
Part Number:
ATmega128A-AU
Manufacturer:
ATMEL
Quantity:
3 480
Part Number:
ATmega128A-AU
Manufacturer:
ATMEL
Quantity:
3 512
Part Number:
ATmega128A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega128A-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega128A-AU
Quantity:
6 944
Part Number:
ATmega128A-AUR
Manufacturer:
ATMEL
Quantity:
3 000
Part Number:
ATmega128A-AUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
21.6
Figure 21-10. Interfacing the Application to the TWI in a Typical Transmission
8151H–AVR–02/11
Hardware
TWI bus
Action
TWI
Using the TWI
1. Application
writes to TWCR
to initiate
transmission of
START
START
2. TWINT set.
Status code indicates
START condition sent
The AVR TWI is byte-oriented and interrupt based. Interrupts are issued after all bus events, like
reception of a byte or transmission of a START condition. Because the TWI is interrupt-based,
the application software is free to carry on other operations during a TWI byte transfer. Note that
the TWI Interrupt Enable (TWIE) bit in TWCR together with the Global Interrupt Enable bit in
SREG allow the application to decide whether or not assertion of the TWINT flag should gener-
ate an interrupt request. If the TWIE bit is cleared, the application must poll the TWINT flag in
order to detect actions on the TWI bus.
When the TWINT flag is asserted, the TWI has finished an operation and awaits application
response. In this case, the TWI Status Register (TWSR) contains a value indicating the current
state of the TWI bus. The application software can then decide how the TWI should behave in
the next TWI bus cycle by manipulating the TWCR and TWDR Registers.
Figure 21-10
this example, a master wishes to transmit a single data byte to a slave. This description is quite
abstract, a more detailed explanation follows later in this section. A simple code example imple-
menting the desired behavior is also presented.
3. Check TWSR to see if START
was sent. Application loads
SLA+W into TWDR, and loads
appropriate control signals into
TWCR, making sure that TWINT
is written to one, and TWSTA is
written to zero.
1. The first step in a TWI transmission is to transmit a START condition. This is done by
2. When the START condition has been transmitted, the TWINT flag in TWCR is set, and
3. The application software should now examine the value of TWSR, to make sure that the
writing a specific value into TWCR, instructing the TWI hardware to transmit a START
condition. Which value to write is described later on. However, it is important that the
TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI
will not start any operation as long as the TWINT bit in TWCR is set. Immediately after
the application has cleared TWINT, the TWI will initiate transmission of the START
condition.
TWSR is updated with a status code indicating that the START condition has success-
fully been sent.
START condition was successfully transmitted. If TWSR indicates otherwise, the appli-
SLA+W
is a simple example of how the application can interface to the TWI hardware. In
4. TWINT set.
Status code indicates
SLA+W sendt, ACK
received
A
5. Check TWSR to see if SLA+W
was sent and ACK received.
Application loads data into TWDR,
and loads appropriate control signals
into TWCR, making sure that TWINT
is written to one.
Data
6. TWINT set.
Status code indicates
data sent, ACK received
A
7. Check TWSR to see if data
was sent and ACK received.
Application loads appropriate
control signals to send STOP
into TWCR, making sure that
TWINT is written to one
ATmega128A
STOP
TWINT set
Indicates
209

Related parts for ATmega128A