ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 108

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8151H–AVR–02/11
Table 14-4
mode.
Table 14-4.
Note:
Table 14-5
rect PWM mode.
Table 14-5.
Note:
• Bit 2:0 – CS02:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
14-6.
COM01
COM01
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare
match is ignored, but the set or clear is done at BOTTOM. See
for more details.
match is ignored, but the set or clear is done at TOP. See
101
shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase cor-
shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM00
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
for more details.
0
1
0
1
COM00
0
1
0
1
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match when up-counting. Set OC0 on compare match
when downcounting.
Set OC0 on compare match when up-counting. Clear OC0 on compare match
when downcounting.
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match, set OC0 at BOTTOM,
(non-inverting mode)
Set OC0 on compare match, clear OC0 at BOTTOM,
(inverting mode)
(1)
“Phase Correct PWM Mode” on page
(1)
“Fast PWM Mode” on page 99
ATmega128A
Table
108