SC16IS741IPW,128 NXP Semiconductors, SC16IS741IPW,128 Datasheet - Page 25

• Manufacturer Part Number: SC16IS741IPW,128
• Description: IC UART 16TSSOP
• Manufacturer: NXP Semiconductors
• Type: IrDA or RS-232 or RS-485r

Specifications of SC16IS741IPW,128

• Number Of Channels: 1, UART
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Features: RS-485
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935290736128

NXP Semiconductors
SC16IS741_1
Product data sheet
8.8 Interrupt Enable Register (IER)
The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver
error, RHR interrupt, THR interrupt, modem status, Xoff received, or CTS/RTS change of
state from LOW to HIGH. The IRQ output signal is activated in response to interrupt
generation.
Table 19.
[1]
Bit
7
6
5
4
3
2
1
0
IER[7:4] can only be modified if EFR[4] is set, that is, EFR[4] is a write enable. Re-enabling IER[1] will not
cause a new interrupt if the THR is below the threshold.
IER[7]
IER[6]
IER[5]
IER[4]
IER[3]
IER[2]
IER[1]
IER[0]
Symbol
Interrupt Enable Register bits description
Table 19
[1]
[1]
[1]
[1]
Description
CTS interrupt enable
RTS interrupt enable
Xoff interrupt
Sleep mode
reserved
Receive Line Status interrupt
Transmit Holding Register interrupt.
Receive Holding Register interrupt.
logic 0 = disable the CTS interrupt (normal default condition)
logic 1 = enable the CTS interrupt
logic 0 = disable the RTS interrupt (normal default condition)
logic 1 = enable the RTS interrupt
logic 0 = disable the Xoff interrupt (normal default condition)
logic 1 = enable the Xoff interrupt
logic 0 = disable Sleep mode (normal default condition)
logic 1 = enable Sleep mode. See
logic 0 = disable the receiver line status interrupt (normal default condition)
logic 1 = enable the receiver line status interrupt
logic 0 = disable the THR interrupt (normal default condition)
logic 1 = enable the THR interrupt
logic 0 = disable the RHR interrupt (normal default condition)
logic 1 = enable the RHR interrupt
Single UART with I
shows the Interrupt Enable Register bit settings.
Rev. 01 — 29 April 2010
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Section 7.6 “Sleep mode”
SC16IS741
© NXP B.V. 2010. All rights reserved.
for details.
25 of 52