SC16IS741IPW,128 NXP Semiconductors, SC16IS741IPW,128 Datasheet - Page 17

• Manufacturer Part Number: SC16IS741IPW,128
• Description: IC UART 16TSSOP
• Manufacturer: NXP Semiconductors
• Type: IrDA or RS-232 or RS-485r

Specifications of SC16IS741IPW,128

• Number Of Channels: 1, UART
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Features: RS-485
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935290736128

Table 10.
Register
address
General register set
0x00
0x00
0x01
0x02
0x02
0x03
0x04
0x05
0x06
0x07
0x06
0x07
0x08
0x09
0x0D
0x0E
0x0F
Special register set
0x00
0x01
SC16IS741 internal registers
Register
RHR
THR
IER
FCR
IIR
LCR
MCR
LSR
MSR
SPR
TCR
TLR
TXLVL
RXLVL
reserved
UART reset reserved
EFCR
DLL
DLH
[5]
[6]
[6]
[3]
[7]
[1]
Bit 7
bit 7
bit 7
CTS
interrupt
enable
RX trigger
level (MSB)
FIFO enable FIFO enable interrupt
Divisor Latch
Enable
clock
divisor
FIFO data
error
0
bit 7
bit 7
bit 7
bit 7
bit 7
reserved
IrDA mode
bit 7
bit 7
[2]
[2]
[3]
[3]
Bit 6
bit 6
bit 6
RTS interrupt
enable
RX trigger
level (LSB)
set break
IrDA mode
enable
THR and
TSR empty
0
bit 6
bit 6
bit 6
bit 6
bit 6
reserved
reserved
reserved
bit 6
bit 6
[2]
[2]
[3]
[3]
[3]
Bit 5
bit 5
bit 5
Xoff
TX trigger
level (MSB)
priority bit 4
set parity
Xon Any
THR empty
0
bit 5
bit 5
bit 5
bit 5
bit 5
reserved
reserved
auto RS-485
RTS output
inversion
bit 5
bit 5
[2]
[2]
[3]
[3]
[2]
[2]
Bit 4
bit 4
bit 4
Sleep mode
TX trigger
level (LSB)
interrupt
priority bit 3
even parity
loopback
enable
break interrupt framing error
CTS
bit 4
bit 4
bit 4
bit 4
bit 4
reserved
reserved
auto RS-485
RTS direction
control
bit 4
bit 4
[3]
[3]
[2]
[2]
[2]
Bit 3
bit 3
bit 3
modem status
interrupt
reserved
interrupt
priority bit 2
parity enable
reserved
0
bit 3
bit 3
bit 3
bit 3
bit 3
reserved
UART
software reset
reserved
bit 3
bit 3
[3]
[3]
[3]
[3]
Bit 2
bit 2
bit 2
receive line
status interrupt
TX FIFO
reset
interrupt
priority bit 1
stop bit
TCR and TLR
enable
parity error
0
bit 2
bit 2
bit 2
bit 2
bit 2
reserved
reserved
transmitter
disable
bit 2
bit 2
[4]
[2]
[3]
[3]
overrun error
bit 1
Bit 1
bit 1
bit 1
THR empty
interrupt
RX FIFO
reset
interrupt
priority bit 0
word length
bit 1
RTS
0
bit 1
bit 1
bit 1
bit 1
reserved
reserved
receiver
disable
bit 1
bit 1
[4]
[3]
[3]
Bit 0
bit 0
bit 0
RX data
available
interrupt
FIFO enable
interrupt status R
word length
bit 0
reserved
data in receiver R
ΔCTS
bit 0
bit 0
bit 0
bit 0
bit 0
reserved
reserved
9-bit mode
enable
bit 0
bit 0
[3]
[3]
[3]
R/W
R
W
R/W
W
R/W
R/W
R
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W