PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 58

• Manufacturer Part Number: PEF 20550 H V2.1
• Description: IC INTERFACE CTRLR PCM MQFP80
• Manufacturer: Infineon Technologies
• Series: ELIC®r

Specifications of PEF 20550 H V2.1

• Function: Line Card Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-SQFP
• Includes: Change Detection, Power-Up Reset Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF20550HV2.1XT; PEF20550HV21XP; SP000007794; SP000007795

transmit data.
In interrupt mode the user loads the data and then executes a transmit command.
When the frames are longer than 32 bytes, a XPR-interrupt is issued as soon as the
accessible XFIFO-part is available again.
RME-interrupt is generated. The configuration of the RFIFO prior to and after
acknowledgment is shown in figure 32 (left). If frames longer than 64 bytes are
received, the SACCO will repeatedly prompt to read out 32-byte data blocks via interrupt
or DMA.
Figure 32
Frame Storage in RFIFO (single frame / multiple frames)
In the case of several shorter frames, up to 17 frames may be stored in the RFIFO.
Nevertheless, only one frame is stored in the CPU accessible part of the RFIFO. E.g., if
frame i (or the last part of frame i) is stored in the accessible RFIFO-part, up to 16 short
frames may be stored in the other half (i + 1, i + 2, …, i + n, n
illustrated in figure 32 (right).
Note: After every frame a receive status byte is appended, specifying the status of the
When using the DMA-mode, the SACCO requests fixed size block transfers (4, 8, 16 or
32 bytes). The valid byte count is determined by reading the registers RBCH, RBCL
following the RME-interrupt.
Transmit FIFO
The transmit FIFO (XFIFO) provides a 2
Semiconductor Group
CPU Inaccessible
FIFO Part,
32 Bytes
CPU Accessible
FIFO Part,
32 Bytes
frame (e.g. if the CRC-check is o.k.).
RFIFO Status Prior
to Acknowledgement
Block B+1
32 Bytes
Frame j
Block B
Frame j
Free
RFIFO Status After
Acknowledgement
Block B+1
Free
Free
58
32 bytes capability to intermediately store
RFIFO Status Prior
to Acknowledgement
Last Block of
Frame i+n
Frame i+1
Frame i
Free
Free
Functional Description
0 < n < 17
16). This behavior is
RFIFO Status After
Acknowledgement
Frame i+2
Frame i+n
Frame i+1
Free
Free
PEB 20550
PEF 20550
ITD05830
01.96