PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 50

• Manufacturer Part Number: PEF 20550 H V2.1
• Description: IC INTERFACE CTRLR PCM MQFP80
• Manufacturer: Infineon Technologies
• Series: ELIC®r

Specifications of PEF 20550 H V2.1

• Function: Line Card Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-SQFP
• Includes: Change Detection, Power-Up Reset Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF20550HV2.1XT; PEF20550HV21XP; SP000007794; SP000007795

PEB 20550
PEF 20550
Functional Description
2.2.6.2 Configurable Interface
In order to optimize the on-board interchip communication, a very flexible serial interface
is available. It formats the data transmitted or received at the DDn-, DUn- or SIPn-lines.
Although it is typically used in IOM-2 or SLD-configuration to connect layer-1 devices,
application specific frame structures can be defined (e.g. to interface ADPCM-
converters or maintenance blocks).
2.2.6.3 Memory Structure and Switching
The memory block of the EPIC-1 performs the switching functionality.
It consists of four sub blocks:
– Upstream data memory
– Downstream data memory
– Upstream control memory
– Downstream control memory.
The PCM-interface reads periodically from the upstream (writes periodically to the
downstream) data memory (cyclical access), see figure 24.
The CFI reads periodically the control memory and uses the extracted values as a
pointers to write to the upstream (read from the downstream) data memory (random
access). In the case of C/I- or signaling channel applications the corresponding data is
stored in the control memory. In order to select the application of choice, the control
memory provides a code portion.
The control memory is accessible via the P-interface. In order to establish a connection
between CFI time slot A and PCM-interface time slot B, the B-pointer has to be loaded
into the control memory location A.
Semiconductor Group
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