PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 174

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PEF 20550 H V2.1

Manufacturer Part Number
PEF 20550 H V2.1
Description
IC INTERFACE CTRLR PCM MQFP80
Manufacturer
Infineon Technologies
Series
ELIC®r
Datasheet

Specifications of PEF 20550 H V2.1

Function
Line Card Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-SQFP
Includes
Change Detection, Power-Up Reset Generation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF20550HV2.1XT
PEF20550HV21XP
SP000007794
SP000007795
RC
RL6..0
4.7.10 Receive Length Check Register (RLCR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 0xxxxxxx
Semiconductor Group
bit 7
RC
Receive Check enable.
A ’1’ enables, a ’0’ disables the receive frame length feature.
Receive Length.
The maximum receive length after which data reception is suspended can be
programmed in RL6..0. The maximum allowed receive frame length is
(RL + 1)
aborted by the opposite station (RME-interrupt, RAB-bit set (VFR in clock
mode 3)).
In this case the receive byte count (RBCH, RBCL) is greater than the
programmed receive length.
RL6
32 bytes. A frame exceeding this length is treated as if it was
H
RL5
RL4
174
write
write
RL3
address: (Ch-A/Ch-B): 2E
address: (Ch-A/Ch-B): 5C
Detailed Register Description
RL2
RL1
PEB 20550
PEF 20550
bit 0
RL0
H
H
/6E
/DC
01.96
H
H

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