PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 217

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PEF 20550 H V2.1

Manufacturer Part Number
PEF 20550 H V2.1
Description
IC INTERFACE CTRLR PCM MQFP80
Manufacturer
Infineon Technologies
Series
ELIC®r
Datasheet

Specifications of PEF 20550 H V2.1

Function
Line Card Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-SQFP
Includes
Change Detection, Power-Up Reset Generation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF20550HV2.1XT
PEF20550HV21XP
SP000007794
SP000007795
Figure 68 shows the relationship between the DCL input and the generated RCL for the
different prescaler divisors in case CMD1:CSS = 1:
Figure 68
Clock Signal Timing for the Different Prescaler Divisors if CMD1:CSS = 1
CFI Clock Output Rate CMD2:COC
This feature applies only if the configurable interface is clocked and synchronized via the
PCM interface clock and framing signals (PDC, PFS), i.e. if CMD1:CSS = 0.
In this case the ELIC delivers an output clock signal at pin DCL with a frequency identical
to or double the selected CFI data rate:
For CMD2:COC = 0, the frequency of DCL is identical to the CFI data rate
For CMD2:COC = 1, the frequency of DCL is twice the CFI data rate
Semiconductor Group
FSC
FSC
DCL
RCL
RCL
RCL
RCL
RCL
RCL
(all CFI modes)
(CFI modes 0 and 3 only!)
217
Conditions:
CMD1 : CSM = 1
CMD1
CFI Modes 0, 1 and 3
CFI Mode 2
CFI Modes 0, 1 and 3
CFI Mode 2
CFI Modes 0, 1 and 3
CFI Mode 2
:
CSM
Application Hints
=
0
PEB 20550
PEF 20550
ITT08047
01.96

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