PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 147

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PEF 20550 H V2.1

Manufacturer Part Number
PEF 20550 H V2.1
Description
IC INTERFACE CTRLR PCM MQFP80
Manufacturer
Infineon Technologies
Series
ELIC®r
Datasheet

Specifications of PEF 20550 H V2.1

Function
Line Card Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-SQFP
Includes
Change Detection, Power-Up Reset Generation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF20550HV2.1XT
PEF20550HV21XP
SP000007794
SP000007795
and downstream memory blocks. Bits MA6..0 encode the CFI- or PCM-port and time slot
number as in the following tables:
Table 19
Time Slot Encoding for Data Memory Accesses
PCM-mode 1,3
PCM-mode 2
4.6.14 Memory Access Address Register (MAAR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
The Memory Access Address Register MAAR specifies the address of the memory
access. This address encodes a CFI time slot for control memory (CM) and a PCM time
slot for data memory (DM) accesses. Bit 7 of MAAR (U/D-bit) selects between upstream
PCM-mode 0
Semiconductor Group
bit 7
U/D
MA6
H
MA5
bit U/D
bits MA6..MA3, MA0
bits MA2..MA1
bit U/D
bits MA6..MA3, MA1, MA0
bit MA2
bit U/D
bits MA6..MA0
Data Memory Address
MA4
147
MA3
read/write
read/write
Detailed Register Description
MA2
direction selection
time slot selection
logical PCM-port number
direction selection
time slot selection
logical PCM-port number
direction selection
time slot selection
address: 01
address: 02
MA1
PEB 20550
PEF 20550
bit 0
H
H
MA0
01.96

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