LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 28

• Manufacturer Part Number: LPC4350FET256,551
• Description: IC MCU 32BIT 256LBGA
• Manufacturer: NXP Semiconductors
• Series: LPC43xxr

Specifications of LPC4350FET256,551

• Core Processor: ARM® Cortex™-M4/M0
• Core Size: 32-Bit Dual-Core
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 146
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 264K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P5_7
P6_0
P6_1
Pin description
R12
M12
R15
x
x
x
…continued
-
H7
G5
91
105 73
107 74
65
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
-
-
-
[3]
[3]
[3]
I; PU I/O GPIO2[7] — General purpose digital input/output pin.
I; PU -
I; PU I/O GPIO3[0] — General purpose digital input/output pin.
O
I/O EMC_D11 — External memory data line 11.
-
I
O
-
-
O
-
-
I/O I2S0_RX_SCK — Receive Clock. It is driven by the
-
-
-
O
I/O U0_UCLK — Serial clock input/output for USART0 in
I/O I2S0_RX_WS — Receive Word Select. It is driven by
-
I
-
-
Description
MCOA2 — Motor control PWM channel 2, output A.
R — Function reserved.
U1_RXD — Receiver input for UART 1.
T1_MAT3 — Match output 3 of timer 1.
R — Function reserved.
R — Function reserved.
R — Function reserved.
I2S0_RX_MCLK — I2S receive master clock.
R — Function reserved.
R — Function reserved.
master and received by the slave. Corresponds to the
signal SCK in the I
R — Function reserved.
R — Function reserved.
R — Function reserved.
EMC_DYCS1 — SDRAM chip select 1.
synchronous mode.
the master and received by the slave. Corresponds to
the signal WS in the I
R — Function reserved.
T2_CAP0 — Capture input 2 of timer 2.
R — Function reserved.
R — Function reserved.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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