LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 106
LPC4350FET256,551
Manufacturer Part Number
LPC4350FET256,551
Description
IC MCU 32BIT 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4350FET256,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
146
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
264K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4350FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
LPC4350_30_20_10
Objective data sheet
Fig 26. I
SDA
SCL
2
C-bus pins clock timing
70 %
30 %
S
11.5 I
t
f
t
f
70 %
Table 14.
T
[1]
30 %
Symbol
common to input and output
t
t
t
t
output
t
input
t
t
2
r
f
WH
WL
v(Q)
su(D)
h(D)
amb
S-bus interface
CCLK = 100 MHz; peripheral clock to the I
1600 ns, corresponds to the SCK signal in the I
1 / f
=
SCL
40
Dynamic characteristics: I
Parameter
rise time
fall time
pulse width HIGH
pulse width LOW
data output valid time
data input set-up time
data input hold time
t
C to 85
HD;DAT
70 %
30 %
70 %
30 %
All information provided in this document is subject to legal disclaimers.
t
SU;DAT
C, V
Rev. 2.1 — 23 September 2011
DD(REG)(3V3)
70 %
30 %
= <tbd>. Conditions and data refer to I2S0 and I2S1 pins.
t
LOW
2
Conditions
on pins I2S_TX_SCK and
I2S_RX_SCK
on pins I2S_TX_SCK and
I2S_RX_SCK
on pin I2S_TX_SDA
on pin I2S_RX_SDA
on pin I2S_RX_SDA
S-bus interface pins
2
S-bus interface PCLK = CCLK / 4. I
2
S-bus specification.
t
HIGH
32-bit ARM Cortex-M4/M0 microcontroller
70 %
30 %
LPC4350/30/20/10
t
VD;DAT
[1]
[1]
[1]
[1]
[1]
[1]
[1]
2
Min
-
-
<tbd>
-
-
<tbd>
<tbd>
S clock cycle time T
© NXP B.V. 2011. All rights reserved.
Max
<tbd>
<tbd>
-
<tbd>
<tbd>
-
-
002aaf425
106 of 145
Unit
ns
ns
-
ns
ns
ns
ns
cy(clk)
=
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