lpc4310 NXP Semiconductors, lpc4310 Datasheet

lpc4310

Manufacturer Part Number

lpc4310

Description

Lpc4350/30/20/10 32-bit Arm Cortex-m4/m0 Mcu; Up To 264 Kb Sram; Ethernet; Two High-speed Usbs; Advanced Configurable Peripherals

Manufacturer

NXP Semiconductors

Datasheet

1.LPC4310.pdf (85 pages)

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Quantity

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Manufacturer:

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Current page: 1 of 85
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1. General description

2. Features and benefits

The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embedded

applications. The ARM Cortex-M4 is a next generation core that offers system

enhancements such as low power consumption, enhanced debug features, and a high

level of support block integration.

The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARM

Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals, and

includes an internal prefetch unit that supports speculative branching. The ARM

Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A

hardware floating-point processor is integrated in the core.

The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of data

memory, advanced configurable peripherals such as the State Configurable Timer (SCT)

and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,

Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals.

LPC4350/30/20/10

32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet;

two High-speed USBs; advanced configurable peripherals

Rev. 1 — 29 October 2010

Cortex-M4 Processor core

Cortex-M0 Processor core

On-chip memory

ARM Cortex-M4 processor, running at frequencies of up to 150 MHz.

ARM Cortex-M4 built-in Memory Protection Unit (MPU) supporting eight regions.

ARM Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC).

Hardware floating-point unit.

Non-maskable Interrupt (NMI) input.

JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch

points.

System tick timer.

ARM Cortex-M0 co-processor capable of off-loading the main ARM Cortex-M4

application processor.

Running at frequencies of up to 150 MHz.

JTAG, Serial Wire Debug, and built-in NVIC.

200 kB SRAM for code and data use.

Two 32 kB SRAM blocks with separate bus access. Both SRAM blocks can be

powered down individually.

32 kB ROM containing boot code and on-chip software drivers.

Objective data sheet

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