ISP1562BE STEricsson, ISP1562BE Datasheet - Page 12

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ISP1562BE

Manufacturer Part Number
ISP1562BE
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1562BE

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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NXP Semiconductors
ISP1562_3
Product data sheet
7.7 Power-On Reset (POR)
7.8 Power supply
Figure 3
to t5. At t0, POR will start with 1. At t1, the detector passes through the trip level. Another
delay will be added before POR drops to 0 to ensure that the length of the generated
detector pulse, POR, is large enough to reset asynchronous flip-flops. If the dip is too
short (t4 to t5 < 11 s), POR will not react and will stay LOW.
Figure 4
Fig 3.
t0
shows a possible curve of V
shows the ISP1562 power supply connection.
V
Power-on reset
POR(trip)
t1
is typically 0.9 V.
Rev. 03 — 14 November 2008
t2
I(VAUX3V3)
t3
and V
t4
I(VREG3V3)
t5
004aab194
HS USB PCI host controller
with dips at t2 to t3 and t4
V
V
POR
I(VAUX3V3),
POR(trip)
© NXP B.V. 2008. All rights reserved.
ISP1562
V
I(VREG3V3)
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