TE28F800B3B110 Intel, TE28F800B3B110 Datasheet - Page 8

• Manufacturer Part Number: TE28F800B3B110
• Manufacturer: Intel

Specifications of TE28F800B3B110

• Lead Free Status / Rohs Status: Not Compliant

28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.2
Table 2.
2.0
Table 3.
18 Aug 2005
8
V
V
V
Bus Width
Speed
Memory Arrangement
CC
CCQ
PP
Program/Erase Voltage
Read Voltage
I/O Voltage
Feature
Conventions
Conventions
Functional Overview
The B3 flash memory device features the following:
B3 Device Feature Summary (Sheet 1 of 2)
Pin or signal
Group Membership Brackets
Set
Clear:
Block
Main Block
Parameter Block
•
•
•
•
Enhanced blocking for easy segmentation of code and data or additional design flexibility.
Program Suspend to Read command.
V
pinout diagrams and V
Maximum program and erase time specification for improved data storage.
CCQ
Convention
input of 1.65 V to 2.5 V or 2.7 V to 3.6 V on all I/Os. See
Intel
28F008B3, 28F016B3
2048 Kbit x 8 (16 Mbit)
1024 Kbit x 8 (8 Mbit),
®
Order Number: 290580, Revision: 020
Advanced Boot Block Flash Memory (B3)
8 bit
CCQ
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
Used interchangeably to refer to the external signal connections on the
package.
Note:
Square brackets designate group membership or define a group of signals
with similar function (for example, A[21:1], SR[4:1])
When referring to registers, the term set means the bit is a logical 1.
When referring to registers, the term clear means the bit is a logical 0.
A group of bits (or words) that erase simultaneously using one block erase
instruction.
A block that contains 32 Kwords.
A block that contains 4 Kwords.
2.7 V– 3.6 V or 11.4 V– 12.6 V
1.65 V–2.5 V or 2.7 V– 3.6 V
location.
For a chip scale package (CSP), the term ball is used in place of pin.
2.7 V– 3.6 V
28F320B3
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
28F800B3, 28F160B3,
512 Kbit x 16 (8 Mbit),
16 bit
Description
(3)
, 28F640B3
Figure 1
Section
7.2
Section 4.2, 4.4
Section 4.2, 4.4
Table 27
Section 8.1
Section 3.2
through
Reference
6.2,
Figure 4
Datasheet
Section
for