TE28F800B3B110 Intel, TE28F800B3B110 Datasheet - Page 38

• Manufacturer Part Number: TE28F800B3B110
• Manufacturer: Intel

Specifications of TE28F800B3B110

• Lead Free Status / Rohs Status: Not Compliant

28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 16.
R10
Notes:
1.
2.
3.
4.
18 Aug 2005
38
R1
R2
R3
R4
R5
R6
R7
R8
R9
#
t
t
t
t
t
t
t
t
t
Sym
GHQZ
AVQV
GLQV
PHQV
GLQX
EHQZ
ELQV
ELQX
AVAV
t
OH
OE# can be delayed up to t
Sampled, but not 100% tested.
See
See
input slew rate.
Figure 10 “Read Operation Waveform” on page
Figure 12 “AC Input/Output Reference Waveform” on page 46
Read Cycle Time
Address to Output
Delay
CE# to Output
Delay
OE# to Output
Delay
RP# to Output
Delay
CE# to Output in
Low Z
OE# to Output in
Low Z
CE# to Output in
High Z
OE# to Output in
High Z
Output Hold from
Address, CE#, or
OE# Change,
Whichever Occurs
First
Param
eter
Read Operations—16-Mbit Density
Product
Density
V
CC
Intel
ELQV–
Min
2.7 V–3.6
70
0
0
0
70 ns
V
®
Order Number: 290580, Revision: 020
t
GLQV
Max
150
Advanced Boot Block Flash Memory (B3)
70
70
20
20
20
after the falling edge of CE# without impact on t
Min
2.7 V–3.6
80
0
0
0
80 ns
V
Max
150
80
80
20
20
20
40.
Min
3.0 V–3.6
80
0
0
0
V
Max
150
80
80
30
20
20
16 Mbit
90 ns
for timing measurements and maximum allowable
Min
2.7 V–3.6
90
0
0
0
V
Max
150
90
90
30
20
20
Min
100
0
0
0
3.0 V–
3.6V
Max
ELQV
100
100
150
30
20
20
110 ns
.
2.7 V–3.6V
Min
110
0
0
0
Max
150
110
110
30
20
20
Unit
Datasheet
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1,3,4
1,3,4
2,3,4
2,3,4
2,3,4
2,3,4
2,3,4
3,4
3,4
3,4