TE28F800B3B110 Intel, TE28F800B3B110 Datasheet - Page 53

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TE28F800B3B110

Manufacturer Part Number
TE28F800B3B110
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F800B3B110

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10.1.5
11.0
Datasheet
Write
A write occurs when both CE# and WE# are low and OE# is high. Commands are written to the
Command User Interface (CUI) using standard microprocessor write timings to control flash
memory operations. The CUI does not occupy an addressable memory location. The address and
data buses are latched on the rising edge of the second WE# or CE# pulse, whichever occurs first.
Table 30
moving between the different modes of operation using CUI commands.
Two commands modify array data:
Writing either of these commands to the internal Command User Interface (CUI) initiates a
sequence of internally timed functions that culminate in the completion of the requested task
(unless that operation is aborted by either RP# being driven to V
Suspend command).
Operating Modes
The flash memory device has four read modes:
See
The flash memory device also has two write modes:
Three additional modes are available only during suspended operations:
Table 28 “Command Codes and Descriptions” on page 54
these modes.
Appendix A, “Write State Machine Current/Next States,”
state transitions.
Figure 1 “B3 Architecture Block Diagram” on page
Program (40H).
Erase (20H).
read array
read identifier
read status
read query
program
block erase
erase suspend to program
erase suspend to read
program suspend to read
shows the available commands, and
Intel
®
Order Number: 290580, Revision: 020
Advanced Boot Block Flash Memory (B3)
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Appendix A
10).
summarizes the commands used to reach
is a comprehensive chart showing the
provides detailed information about
IL
for t
PLRH
or an appropriate
18 Aug 2005
53

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