A000003 Arduino, A000003 Datasheet - Page 69
A000003
Manufacturer Part Number
A000003
Description
MCU, MPU & DSP Development Tools MINI
Manufacturer
Arduino
Series
-r
Type
MCUr
Specifications of A000003
Processor To Be Evaluated
Atmega328
Processor Series
ATmega
Data Bus Width
8 bit
Interface Type
USB, RS-232
Operating Supply Voltage
7 V to 9 V
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega168
- Current page: 69 of 378
- Download datasheet (8Mb)
12.2.6
12.2.7
12.2.8
2545S–AVR–07/10
PCMSK2 – Pin Change Mask Register 2
PCMSK1 – Pin Change Mask Register 1
PCMSK0 – Pin Change Mask Register 0
• Bit 0 - PCIF0: Pin Change Interrupt Flag 0
When a logic change on any PCINT7..0 pin triggers an interrupt request, PCIF0 becomes set
(one). If the I-bit in SREG and the PCIE0 bit in PCICR are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
• Bit 7..0 – PCINT23..16: Pin Change Enable Mask 23..16
Each PCINT23..16-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT23..16 is set and the PCIE2 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT23..16 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
• Bit 7 – Res: Reserved Bit
This bit is an unused bit in the ATmega48/88/168, and will always read as zero.
• Bit 6..0 – PCINT14..8: Pin Change Enable Mask 14..8
Each PCINT14..8-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT14..8 is set and the PCIE1 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT14..8 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT7..0 is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the corresponding I/O pin
is disabled.
Bit
(0x6D)
Read/Write
Initial Value
Bit
(0x6C)
Read/Write
Initial Value
Bit
(0x6B)
Read/Write
Initial Value
PCINT23
R/W
7
PCINT7
R/W
0
7
0
R
7
–
0
PCINT22
6
PCINT6
R/W
0
R/W
PCINT14
6
0
R/W
6
0
PCINT21
5
PCINT5
R/W
0
R/W
PCINT13
5
0
R/W
5
0
PCINT20
4
PCINT4
R/W
0
R/W
PCINT12
4
0
R/W
4
0
PCINT19
3
PCINT3
R/W
0
PCINT11
R/W
3
0
R/W
3
0
PCINT18
2
PCINT2
R/W
0
PCINT10
R/W
ATmega48/88/168
2
0
R/W
2
0
PCINT17
1
PCINT1
R/W
0
PCINT9
R/W
R/W
1
0
1
0
0
PCINT0
R/W
0
PCINT16
PCINT8
R/W
R/W
0
0
0
0
PCMSK0
PCMSK2
PCMSK1
69
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