A000003 Arduino, A000003 Datasheet - Page 154

• Manufacturer Part Number: A000003
• Description: MCU, MPU & DSP Development Tools MINI
• Manufacturer: Arduino
• Series: -r
• Type: MCUr

Specifications of A000003

• Processor To Be Evaluated: Atmega328
• Processor Series: ATmega
• Data Bus Width: 8 bit
• Interface Type: USB, RS-232
• Operating Supply Voltage: 7 V to 9 V
• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega168

154
ATmega48/88/168
Table 17-6
mode.
Table 17-6.
Note:
Table 17-7
rect PWM mode.
Table 17-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATmega48/88/168 and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
COM2B1
COM2B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 147
pare Match is ignored, but the set or clear is done at TOP. See
page 147
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2B0
COM2B0
for more details.
for more details.
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode)
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(invertiing mode)
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
Table
17-8. Modes of operation supported by the Timer/Counter
“Modes of Operation” on page
(1)
(1)
“Phase Correct PWM Mode” on
“Phase Correct PWM Mode” on
144).
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