A000003 Arduino, A000003 Datasheet - Page 282
A000003
Manufacturer Part Number
A000003
Description
MCU, MPU & DSP Development Tools MINI
Manufacturer
Arduino
Series
-r
Type
MCUr
Specifications of A000003
Processor To Be Evaluated
Atmega328
Processor Series
ATmega
Data Bus Width
8 bit
Interface Type
USB, RS-232
Operating Supply Voltage
7 V to 9 V
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega168
- Current page: 282 of 378
- Download datasheet (8Mb)
26.9
26.9.1
282
Register Description
ATmega48/88/168
SPMCSR – Store Program Memory Control and Status Register
Table 26-11. Explanation of Different Variables used in
Note:
The Store Program Memory Control and Status Register contains the control bits needed to con-
trol the Boot Loader operations.
• Bit 7 – SPMIE: SPM Interrupt Enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM
ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as the SELF-
PRGEN bit in the SPMCSR Register is cleared.
• Bit 6 – RWWSB: Read-While-Write Section Busy
When a Self-Programming (Page Erase or Page Write) operation to the RWW section is initi-
ated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the RWW section
cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is written to one after a
Self-Programming operation is completed. Alternatively the RWWSB bit will automatically be
cleared if a page load operation is initiated.
Bit
0x37 (0x57)
Read/Write
Initial Value
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
1. Z15:Z14: always ignored
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
pointer, ATmega168
SPMIE
“Addressing the Flash During Self-Programming” on page 273
R/W
7
0
PC[12:6]
PC[5:0]
12
5
RWWSB
R
6
0
Corresponding
Z-value
Z13:Z7
R
5
–
0
Z6:Z1
Z13
Z6
(1)
RWWSRE
R/W
4
0
Description
Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
Most significant bit which is used to address
the words within one page (64 words in a page
requires 6 bits PC [5:0])
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
Program counter page address: Page select, for
page erase and page write
Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
BLBSET
R/W
3
0
Figure 26-3
PGWRT
R/W
2
0
PGERS
R/W
and the Mapping to the Z-
1
0
for details about the use of
SELFPRGEN
R/W
0
0
2545S–AVR–07/10
SPMCSR
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