PIC18F1220-I/SO Microchip Technology Inc., PIC18F1220-I/SO Datasheet - Page 91

• Manufacturer Part Number: PIC18F1220-I/SO
• Description: Microcontroller; 4 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-SOIC
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F1220-I/SO

• A/d Inputs: 7-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 4K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

FIGURE 10-6:
TABLE 10-1:
TABLE 10-2:
 2004 Microchip Technology Inc.
PORTA
LATA
TRISA
ADCON1
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
Note 1:
RA0/AN0
RA1/AN1/LVDIN
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
MCLR/V
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend: TTL = TTL input, ST = Schmitt Trigger input
Name
2:
Name
PP
TRISA7
RA7:RA6 and their associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.
RA5 is an input only if MCLR is disabled.
/RA5
LATA7
REF
REF
RA7
Bit 7
—
-
+
(1)
PORTA FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
(1)
(1)
MCLRE
RD TRISA
RD PORTA
Internal MCLR
Data Bus
RD LATA
High-Voltage Detect
TRISA6
MCLR/V
LATA6
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
PCFG6
RA6
Bit 6
(1)
(1)
(1)
Buffer
PP
ST
ST
ST
ST
ST
ST
ST
ST
PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 -000 0000 -000 0000
RA5
/RA5 PIN BLOCK DIAGRAM
Bit 5
—
—
(2)
Input/output port pin or analog input.
Input/output port pin, analog input or Low-Voltage Detect input.
Input/output port pin, analog input or V
Input/output port pin, analog input or V
Input/output port pin or external clock input for Timer0.
Output is open-drain type.
Master Clear input or programming voltage input (if MCLR is enabled); input
only port pin or programming voltage input (if MCLR is disabled).
OSC2, clock output or I/O pin.
OSC1, clock input or I/O pin.
LATA Data Output Register
PORTA Data Direction Register
Bit 4
RA4
Bit 3
RA3
Q
Filter
Latch
Bit 2
EN
RA2
D
Schmitt
Trigger
PIC18F1220/1320
Function
Bit 1
RA1
Low-Level
MCLR Detect
HV
REF
REF
-.
+.
Bit 0
RA0
MCLR/V
PP
xx0x 0000 uu0u 0000
xx-x xxxx uu-u uuuu
11-1 1111 11-1 1111
POR, BOR
/RA5
Value on
DS39605C-page 89
Value on
all other
Resets