PIC18F1220-I/SO Microchip Technology Inc., PIC18F1220-I/SO Datasheet - Page 157

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PIC18F1220-I/SO

Manufacturer Part Number
PIC18F1220-I/SO
Description
Microcontroller; 4 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-SOIC
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F1220-I/SO

A/d Inputs
7-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
4K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
17.0
The Analog-to-Digital (A/D) converter module has
seven inputs for the PIC18F1220/1320 devices. This
module allows conversion of an analog input signal to
a corresponding 10-bit digital number.
A new feature for the A/D converter is the addition of
programmable acquisition time. This feature allows the
user to select a new channel for conversion and to set
the GO/DONE bit immediately. When the GO/DONE bit
is set, the selected channel is sampled for the pro-
grammed acquisition time before a conversion is actu-
ally started. This removes the firmware overhead that
may have been required to allow for an acquisition
(sampling) period (see Register 17-3 and Section 17.3
“Selecting and Configuring Automatic Acquisition
Time”).
REGISTER 17-1:
 2004 Microchip Technology Inc.
10-BIT ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
bit 7-6
bit 5
bit 4-2
bit 1
bit 0
ADCON0: A/D CONTROL REGISTER 0
Legend:
R = Readable bit
-n = Value at POR
VCFG<1:0>: Voltage Reference Configuration bits
Unimplemented: Read as ‘0’
CHS2:CHS0: Analog Channel Select bits
000 = Channel 0 (AN0)
001 = Channel 1 (AN1)
010 = Channel 2 (AN2)
011 = Channel 3 (AN3)
100 = Channel 4 (AN4)
101 = Channel 5 (AN5)
110 = Channel 6 (AN6)
111 = Unimplemented
GO/DONE: A/D Conversion Status bit
When ADON = 1:
1 = A/D conversion in progress
0 = A/D Idle
ADON: A/D On bit
1 = A/D converter module is enabled
0 = A/D converter module is disabled
bit 7
VCFG1
R/W-0
00
01
10
11
Note 1: Performing a conversion on unimplemented channels returns full-scale results.
External V
External V
A/D V
VCFG0
R/W-0
AV
AV
DD
DD
REF
REF
REF
+
+
+
(1)
U-0
W = Writable bit
‘1’ = Bit is set
External V
External V
A/D V
AV
AV
SS
SS
REF
R/W-0
CHS2
REF
REF
-
The module has five registers:
• A/D Result High Register (ADRESH)
• A/D Result Low Register (ADRESL)
• A/D Control Register 0 (ADCON0)
• A/D Control Register 1 (ADCON1)
• A/D Control Register 2 (ADCON2)
The ADCON0 register, shown in Register 17-1,
controls the operation of the A/D module. The
ADCON1 register, shown in Register 17-2, configures
the functions of the port pins. The ADCON2 register,
shown in Register 17-3, configures the A/D clock
source, programmed acquisition time and justification.
-
-
R/W-0
CHS1
PIC18F1220/1320
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CHS0
GO/DONE
x = Bit is unknown
R/W-0
DS39605C-page 155
ADON
R/W-0
bit 0

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