PIC12C671-04I/P Microchip Technology Inc., PIC12C671-04I/P Datasheet - Page 75
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PIC12C671-04I/P
Manufacturer Part Number
PIC12C671-04I/P
Description
8 PIN, 1.75 KB OTP, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12C671-04IP.pdf
(129 pages)
Specifications of PIC12C671-04I/P
A/d Inputs
4-Channel, 8-Bit
Cpu Speed
2.5 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
128 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
COMF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
1999 Microchip Technology Inc.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits
TO and PD are set.
1
1
Before Instruction
After Instruction
Complement f
[ label ] COMF
0
d
(f)
Z
The contents of register ’f’ are
complemented. If ’d’ is 0, the
result is stored in W. If ’d’ is 1, the
result is stored back in register ’f’.
1
1
Before Instruction
After Instruction
CLRWDT
COMF
00
00
f
[0,1]
WDT prescaler,
TO
PD
(dest)
127
WDT
WDT counter =
WDT counter =
WDT prescaler=
TO
PD
REG1
REG1
W
0000
1001
REG1,0
=
=
=
f,d
0110
dfff
=
=
0x13
0x13
0xEC
?
0x00
0
1
1
0100
ffff
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Decrement f
[ label ] DECF f,d
0
d
(f) - 1
Z
Decrement register ’f’. If ’d’ is 0,
the result is stored in the W regis-
ter. If ’d’ is 1, the result is stored
back in register ’f’.
1
1
Before Instruction
After Instruction
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0
d
(f) - 1
None
The contents of register ’f’ are
decremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in reg-
ister ’f’.
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded. A NOP is executed
instead making it a two cycle
instruction.
1
1(2)
Before Instruction
After Instruction
DECF
HERE
CONTINUE •
00
00
PC
CNT
if CNT =
PC
if CNT
PC
f
f
[0,1]
[0,1]
PIC12C67X
127
127
(dest)
(dest);
CNT
Z
CNT
Z
=
=
=
=
0011
1011
CNT,
DECFSZ
GOTO
•
•
address
0,
CNT - 1
0,
address CONTINUE
address HERE+1
DS30561B-page 75
1
=
=
=
=
skip if result = 0
dfff
dfff
HERE
0x01
0
0x00
1
CNT, 1
LOOP
ffff
ffff
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