PIC12C671-04I/P Microchip Technology Inc., PIC12C671-04I/P Datasheet - Page 106
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PIC12C671-04I/P
Manufacturer Part Number
PIC12C671-04I/P
Description
8 PIN, 1.75 KB OTP, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12C671-04IP.pdf
(129 pages)
Specifications of PIC12C671-04I/P
A/d Inputs
4-Channel, 8-Bit
Cpu Speed
2.5 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
128 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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FIGURE 12-9: A/D CONVERSION TIMING
TABLE 12-8:
PIC12C67X
DS30561B-page 106
Note 1: ADRES register may be read on the following T
Param
130
131
132
134
135
No.
Note 1: If the A/D clock source is selected as RC, a time of T
*
†
§
2: See Section 8.1 for min. conditions.
A/D DATA
SAMPLE
A/D CLK
ADRES
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and
are not tested.
This specification ensured by design.
BSF ADCON0, GO
T
T
T
Sym
T
ADIF
T
ACQ
SWC
CNV
GO
AD
GO
Q4
SLEEP instruction to be executed.
134
Characteristic
A/D clock period
Conversion time (not including S/H
time) (Note 1)
Acquisition time
Q4 to A/D clock start
Switching from convert
A/D CONVERSION REQUIREMENTS
132
(T
OSC
/2)
7
(1)
PIC12C67X
PIC12LC67X
PIC12C67X
PIC12LC67X
sample time
6
OLD_DATA
5
CY
SAMPLING STOPPED
Note 2
1.5 §
Min
cycle.
1.6
2.0
2.0
3.0
11
—
5*
4
CY
131
130
is added before the A/D clock starts. This allows the
T
OSC
Typ†
3
4.0
6.0
—
—
—
20
—
—
/2 §
2
Max
6.0
9.0
11
—
—
—
—
—
—
1
Units
T
T
—
AD
AD
s
s
s
s
s
s
1 T
0
1999 Microchip Technology Inc.
CY
T
T
A/D RC Mode
A/D RC Mode
The minimum time is the
amplifier setting time. This
may be used if the "new"
input voltage has not
changed by more than 1 LSb
(i.e., 20.0 mV @ 5.12V) from
the last sampled voltage (as
stated on C
If the A/D clock source is
selected as RC, a time of
T
clock starts. This allows the
SLEEP instruction to be exe-
cuted.
OSC
OSC
CY
is added before the A/D
NEW_DATA
based, V
based, V
DONE
Conditions
HOLD
REF
REF
).
full range
3.0V
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