PIC12C671-04I/P Microchip Technology Inc., PIC12C671-04I/P Datasheet - Page 40

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PIC12C671-04I/P

Manufacturer Part Number
PIC12C671-04I/P
Description
8 PIN, 1.75 KB OTP, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12C671-04I/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
2.5 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
128 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC12C67X
FIGURE 7-3:
FIGURE 7-4:
DS30561B-page 40
Instruction
PC
(Program
Counter)
Fetch
Instruction
Execute
TMR0
OSC1
CLKOUT
Timer0
T0IF bit
(INTCON<2>)
GIE bit
(INTCON<7>)
INSTRUCTION
FLOW
Note 1:
Instruction
fetched
Instruction
executed
2:
3:
(3)
PC
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt flag bit T0IF is sampled here (every Q1).
Interrupt latency = 3T
CLKOUT is available only in the INTRC and EXTRC oscillator modes.
T0
Q1
PC-1
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TIMER0 INTERRUPT TIMING
FEh
Inst (PC)
Inst (PC-1)
Q2
1
PC
MOVWF TMR0 MOVF TMR0,WMOVF TMR0,WMOVF TMR0,WMOVF TMR0,WMOVF TMR0,W
Q3
PC
T0+1
Q4
CY
where T
Q1
FFh
Write TMR0
executed
Inst (PC+1)
PC+1
Inst (PC)
Q2
1
PC +1
CY
= instruction cycle time.
Q3
Read TMR0
reads NT0
Q4
PC+2
Q1
Interrupt Latency
00h
Dummy cycle
Q2
PC +1
Read TMR0
reads NT0
PC+3
Q3
NT0
(2)
Q4
Read TMR0
reads NT0
Q1
PC+4
01h
Dummy cycle
Inst (0004h)
Q2
0004h
Q3
Read TMR0
reads NT0
1999 Microchip Technology Inc.
PC+5
Q4
Q1
02h
Read TMR0
reads NT0 + 1
Inst (0004h)
Inst (0005h)
NT0+1
Q2
0005h
PC+6
Q3
Q4

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