PIC12C671-04I/P Microchip Technology Inc., PIC12C671-04I/P Datasheet - Page 35

no-image

PIC12C671-04I/P

Manufacturer Part Number
PIC12C671-04I/P
Description
8 PIN, 1.75 KB OTP, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12C671-04I/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
2.5 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
128 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
FIGURE 6-3:
FIGURE 6-4:
6.2
After generating a START condition, the processor
transmits a control byte consisting of a EEPROM
address and a Read/Write bit that indicates what type
of operation is to be performed. The EEPROM address
consists of a 4-bit device code (1010) followed by three
don’t care bits.
The last bit of the control byte determines the operation
to be performed. When set to a one, a read operation
is selected, and when set to a zero, a write operation is
selected (Figure 6-5). The bus is monitored for its cor-
responding EEPROM address all the time. It generates
an acknowledge bit if the EEPROM address was true
and it is not in a programming mode.
SCL
SDA
1999 Microchip Technology Inc.
SCL
SDA
(A)
Device Addressing
CONDITION
START
(B)
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
ACKNOWLEDGE TIMING
1
2
3
Data from transmitter
4
ACKNOWLEDGE
ADDRESS OR
VALID
5
(C)
6
TO CHANGE
ALLOWED
7
DATA
Acknowledge
FIGURE 6-5:
8
Start Condition
Bit
S
9
1
Device Select
(D)
1
Receiver must release the SDA line at this
point so the Transmitter can continue
sending data.
0
Data from transmitter
Bits
EEPROM Address
CONTROL BYTE FORMAT
1
2
0
PIC12C67X
Acknowledge Condition
3
Read/Write Bit
X
Don’t Care
Bits
X
DS30561B-page 35
X
CONDITION
R/W
STOP
(C)
ACK
(A)

Related parts for PIC12C671-04I/P