VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 28

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

9.4.9 Parallel MAC Interface Signals - Receive Signals
The following signals are used in Parallel MAC Interface PHY Operating modes and connect to the parallel data bus MAC via
the industry-standard GMII, RGMII, TBI, RTBI and MII interfaces. If these parallel interfaces are not used, all of the following
pins may be left unconnected or tied to ground.
All output pins in the Parallel MAC interface include impedance-calibrated, tristateable output drive capability.
VMDS-10105 Revision 4.1
October 2006
LBGA
BALL
117
A7
B7
A6
B6
A9
B9
A8
B8
B5
PMARX
RX[3:0]
RX[7:4]
CLK0
TBI
Parallel MAC Interface Modes
RD[8:5]
RD[3:0]
uncon-
nected
Leave
RTBI
RXC
pins
and
Signal Name
RXD[3:0] RXD[3:0]
RXD[7:4]
RXCLK
GMII
Table 10. Parallel MAC Interface Signals - Receive Signals
RXCLK
uncon-
nected
Leave
pins
MII
RD[7:4]
RD[3:0]
uncon-
RGMII
nected
Leave
RXC
pins
and
Type
O
O
O
28 of 165
ZC
ZC
ZC
Receive Data Code Group (TBI mode).
Bits [3:0] of 10-bit parallel receive code-group data. When
code groups are properly aligned, any received code group
containing a comma is clocked by the rising edge of
PMARXCLK1.
Multiplexed Receive Data Nibbles (RTBI mode).
The MAC synchronously inputs Bits [3:0] on the rising edge of
RXC, and bits [8:5] on the falling edge of RXC.
Receive Data Code Group (GMII and MII modes).
Receive data is driven out of the device synchronously to the
rising edge of RXC. RXD[3] is the MSB, RXD[0] is the LSB.
Multiplexed Receive Data Nibble (RGMII mode).
Bits [3:0] are synchronously output on the rising edge of RXC,
and bits [7:4] on the falling edge of RXC. RXD[3] is the MSB,
RXD[0] is the LSB.
Receive Data Code Group (TBI mode).
Bits [7:4] of 10-bit parallel receive code-group data. When
code groups are properly aligned, any received code group
containing a comma is clocked by the rising edge of
PMARXCLK1.
Receive Data Code Group (GMII mode).
Receive data is driven out of the device synchronously to the
rising edge of RXC. RXD[7] is the MSB.
PMA Receiver Clock 0 Output (TBI mode).
The protocol device (MAC) uses the rising edge of this
62.5MHz receive clock to latch in odd-numbered code groups
on the received PHY bit stream. This clock may be stretched
during code-group alignment and is not shortened.
Receive Clock Output (GMII, MII, RGMII and RTBI modes).
Receive data is sourced from the PHY synchronous to the ris-
ing edge of RXCLK in GMII/MII modes or RXC in RGMII/RTBI
modes. This clock is recovered from the media.
Description
Datasheet
VSC8211