VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 131

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

28E.15:0 - Reserved
25.4.14 Register 29E (1Dh) - 1000BASE-T Ethernet Packet Generator (EPG) Register #1
29E.15 - EPG Enable
When bit 29E.15 is set to a “1”, the EPG is selected as the driving source for the PHY transmit signals, and the MAC transmit
pins are disabled. When bit 29E.15 is cleared, the MAC has full control of the PHY transmit signals.
29E.14 - EPG Run/Stop
Bit 29E.14 controls the beginning and end of packet transmission. When this bit is set to a “1”, the EPG begins the transmission
of packets. When this bit is cleared, the EPG ends the transmission of packets, after the current packet is transmitted. Bit
29E.14 is valid only if bit 29E.15 is set to a “1”.
29E.13 - Transmission Duration
When bit 29E.13 is set to a “1”, the EPG will continuously transmit packets as long as bit 29E.14 is set to a “1”. If bit 29E.13 is
cleared, the EPG will begin transmission of 30,000,000 packets when bit 29E.14 is set to a “1”, after which time, bit 29E.14 is
automatically cleared. If bit 29E.13 changes during packet transmission, the new value will not take effect until the EPG Run/
Stop bit (29E.14) has been cleared and set to a “1” again.
29E.12:11 - Packet Length
Bits 29E.12:11 select the length of the packets to be generated by the EPG. Note that when these bits are set to “11”, a 10,000-
byte “jumbo” packet is sent, which may not be compatible with all Ethernet equipment. If bits 29E.12:11 change during packet
transmission, the new values will not take effect until the EPG Run/Stop bit (29E.14) has been cleared and set to a “1” again.
29E.10 - Inter-packet Gap
Bit 29E.10 selects the inter-packet gap for packets generated by the EPG. If bit 29E.10 changes during packet transmission, the
new value will not take effect until the EPG Run/Stop bit (29E.14) has been cleared and set to a “1” again.
1
VMDS-10105 Revision 4.1
October 2006
Bit
15
14
13
12:11 Packet Length
10
9:6
5:2
1
0
Refer
section 18.1, “1000BASE-T Ethernet Packet Generator (EPG),”
Register 29E (1Dh) - 1000BASE-T Ethernet Packet Generator (EPG) Register #1
Name
EPG Enable
EPG Run/Stop
Transmission Duration
Inter-packet Gap
Destination Address
Source Address
TXER Control
Bad FCS Generation
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
States
1 = Enable EPG
0 = Disable EPG
1 = Run EPG
0 = Stop EPG
1 = Continuous
0 = Send 30,000,000 packets and stop
00 = 125 bytes
01 = 64 bytes
10 = 1518 bytes
11 = 10,000 bytes (jumbo packet)
1 = 8,192 ns
0 = 96 ns
MSB’s lower nibble of the 6-byte destination address 0001
MSB’s lower nibble of the 6-byte source address
1 = Assert TXER
0 = Do not assert TXER
1 = Generate packets with bad FCS
0 = Generate packets with good FCS
131 of 165
page 64 to for more information.
1
Reset
Value
0
0
0
00
0
0000
0
0
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