VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 20

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

9.3 Signal Type Description
VMDS-10105 Revision 4.1
October 2006
Symbol
O
I
I
A
A
I
I
I
O
PU
PD
PU5V
PD5V
DIFF
OD
OS
NC
I
I
I/O
DIFF
BIAS
DIFF
PU
PD
O
I
G
P
I
ZC
A
/O
/O
Impedance Controlled Output
Digital Input with Pull-down
Digital Input with Pull-down
Digital Open Drain Output
Digital Input with Pull-up
Digital Input with Pull-up
Differential Output Pair
Differential Input Pair
Digital Bidirectional
Digital Bidirectional
Digital Bidirectional
Analog Differential
Power Supply
Digital Output
Open Source
Analog Input
Signal Type
Analog Bias
Digital Input
No Connect
GND
Standard digital input signal. No internal pull-up or pull-down.
Standard digital input. Includes on-chip 100kΩ pull-up to VDDIOMAC, VDDIOMI-
CRO, VDDIOCTRL, or the VDD33A supply. Refer to
and Associated Functional Signals”
Standard digital input. Includes on-chip 100kΩ pull-up to VDDIOMAC, VDDIOMI-
CRO, VDDIOCTRL, or the VDD33A supply. Refer to
and Associated Functional Signals”
Standard digital input. Includes on-chip 100kΩ pull-down to GND.
Standard digital input. Includes on-chip 100k Ω pull-down to GND. This input pin is
5V tolerant.
SerDes differential input pair with 100Ω or 150Ω differential terminations. Pins
should be AC-coupled with external 0.01μF capacitors.
Standard digital output signal.
50Ω integrated (on-chip) source series terminated, digital output signal. Used pri-
marily for timing-sensitive, high speed MAC I/F and 125MHz clock output pins, in
addition to high speed manufacturing test mode pins.
SerDes differential output pair, with on-chip 100Ω or 150Ω differential terminations.
Pins should be AC-coupled with external 0.01μF capacitors.
Tristate-able, digital input and output signal.
Tristate-able, digital input and output signal. Includes on-chip 100kΩ pull-up to
VDDIOMAC, VDDIOMICRO, VDDIOCTRL, or the VDD33A supply. Refer to
Section 9.5: “Power Supply and Associated Functional Signals”
Tristate-able, digital input and output signal. Includes on-chip 100kΩ pull-down to
GND.
Open drain digital output signal. Must be pulled to VDDIOMICRO through an exter-
nal pull-up resistor.
Analog differential signal pair for twisted pair interface.
Analog bias or reference signal. Must be tied to external resistor and/or capacitor
bias network, as shown in
Analog input for sensing variable voltage levels.
Open source digital output signal. Must be pulled to GND through an external pull-
down resistor.
Power supply connection. Must be connected to specified power supply plane.
Ground Connection. Must be connected to ground.
No connect signal. Must be left floating.
Table 1. Signal Type Description
20 of 165
Section 10: “System
Description
for details.
for details. This input pin is 5V tolerant.
Schematics”.
Section 9.5: “Power Supply
Section 9.5: “Power Supply
for details.
Datasheet
VSC8211