VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 103

IC PHY 10/100/1000 SGL 117-LBGA

VSC8211XVW

Manufacturer Part Number
VSC8211XVW
Description
IC PHY 10/100/1000 SGL 117-LBGA
Manufacturer
Vitesse Semiconductor Corp
Type
PHY Transceiverr
Datasheets

Specifications of VSC8211XVW

Number Of Drivers/receivers
1/1
Protocol
Gigabit Ethernet
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
117-LBGA
Case
BGA
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
907-1023

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25.3.19 Register 18 (12h) – Bypass Control Register
18.15 – Reserved
18.14 – Bypass 4B5B Encoder/Decoder
When bit 18.14 is set to “1”, the 5B codes (TXER and TXD[3:0]) will be passed from the MII interface directly to the scrambler,
bypassing the 4B5B encoder. Note that in this mode, J/K and T/R code insertion will not be performed. The receiver will pass
descrambled/aligned 5B codes directly to the MII interface (RXER and RXD[3:0]), bypassing the 4B5B decoder. Carrier sense
(CRS) is still asserted when a valid frame is detected.
18.13 – Bypass Scrambler
When bit 18.13 is set to “1”, the scrambler is disabled.
18.12 – Bypass Descrambler
When bit 18.12 is set to “1”, the descrambler is disabled.
1
2
VMDS-10105 Revision 4.1
October 2006
Bit
15
14
13
12
11:9
8
7:6
5
4
3
2
1
0
This bit applies only in 100BASE-TX mode.
This bit applies only in 100BASE-TX and 1000BASE-T modes.
Register 18 (12h) – Bypass Control Register
Name
Reserved
Bypass 4B5B Encoder/Decoder R/W
Bypass Scrambler
Bypass Descrambler
Reserved
Transmitter Test Clock Enable
Reserved
Disable Automatic Pair Swap
Correction
Disable Polarity Inversion
Parallel-Detect Control
Reserved
Disable Automatic 1000BASE-T
Next-Page Exchange
CLKOUTMAC Output Enable
2
2
Access
RO
R/W
R/W
RO
R/W
RO
R/W
R/W
R/W
RO
R/W
R/W
1
States
1 = Bypass 4B5B encoder/decoder
0 = Enable 4B5B encoder/decoder
1 = Bypass scrambler
0 = Enable scrambler
1 = Bypass descrambler
0 = Enable descrambler
1 = Enable TXCLK test output on CLKOUTMI-
0 = Disable TXCLK test output on CLKOUTMI-
1 = Disable
0 = Enable
1 = Disable
0 = Enable
1 = Do not ignore advertised ability
0 = Ignore advertised ability
1 = Disable automatic 1000BASE-T Next-Page
0 = Enable automatic 1000BASE-T Next-Page
1 = Enable output clock pins CLKOUTMAC
0 = Disable output clock pins CLKOUTMAC
CRO pin
CRO pin
exchanges
exchanges
103 of 165
Reset Value
0
0
0
0
000
0
00
0
0
1
0
0
1
Datasheet
VSC8211
Sticky
S
S
S

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