SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 55

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SAF82532N10V32A

Manufacturer Part Number
SAF82532N10V32A
Description
IC CONTROLLER 2-CH SER 68-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF82532N10V32A

Controller Type
Serial Communications Controller (SCC)
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
SAF82532N10V32A
SAF82532N10V32AIN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF82532N10V32A
Manufacturer:
Infineon Technologies
Quantity:
10 000
Transmission of Frames
The ESCC2 autonomously transmits S commands and S responses in the auto mode.
Either transparent or I-frames can be transmitted by the user. The software timer has to
be operated in the internal timer mode to transmit I-frames. After the frame has been
transmitted, the timer is self-started, the XFIFO is inhibited, and the ESCC2 waits for the
arrival of a positive acknowledgement. This acknowledgement can be provided by
means of an S- or I-frame.
If no positive acknowledgement is received during time
S-command (p = ‘1’), which must be answered by an S-response (f = ‘1’). If the
S-response is not received, the process is performed n1 times (in HDLC known as N2,
refer to register TIMR).
Upon the arrival of an acknowledgement or after the completion of this poll procedure
the XFIFO is enabled and an interrupt is generated. Interrupts may be triggered by the
following:
• message has been positively acknowledged (ALLS interrupt)
• message must be repeated (XMR interrupt)
• response has not been received (TIN interrupt).
Additionally, XPR interrupts are generated which indicate that new data can be written
to the XFIFO. Using XPR enables high data rates, e.g. in conjunction with back-to-back
frames or shared flags.
In automode, however, only when the ALLS interrupt has been issued data of a
new frame may be written to the XFIFO!
Upon arrival of an RNR frame, the software timer is started and the status of the remote
station is polled periodically after expiration of
detected. The user is informed via the appropriate interrupt. If no response is received
after n1 times, a TIN interrupt, and
generated and the process is terminated.
Note: The internal timer mode should only be used in the auto mode.
Transparent frames can be transmitted in all operating modes. After the transmission of
a transparent frame the XFIFO is immediately released, which is confirmed by interrupt
(XPR). In this case, time monitoring can be performed with the timer in the external timer
mode.
Semiconductor Group
t
1
clock periods thereafter an ALLS interrupt is
55
t
1
, until the status ‘receive ready’ has been
t
1
, the ESCC2 transmits an
SAB 82532/SAF 82532
HDLC/SDLC Serial Mode
07.96

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