SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 17

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SAF82532N10V32A

Manufacturer Part Number
SAF82532N10V32A
Description
IC CONTROLLER 2-CH SER 68-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF82532N10V32A

Controller Type
Serial Communications Controller (SCC)
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
SAF82532N10V32A
SAF82532N10V32AIN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF82532N10V32A
Manufacturer:
Infineon Technologies
Quantity:
10 000
1.3
P-LCC-68
34
33
32
31
Semiconductor Group
Pin Definitions and Functions (cont’d)
Pin No.
P-MQFP-80
70
69
68
67
Symbol
DRTA
DRTB
DRRA
DRRB
Input (I)
Output (O)
O
O
17
Function
DMA Request Transmitter
(channel A/channel B)
The transmitter of ESCC2 requests a
DMA transfer by activating this line. The
request remains active as long as the
respective Transmit FIFO requires data
transfers.
The amount of data bytes to be
transferred from the system memory to
the ESCC2 (= byte count) must be written
first to the XBCH, XBCL registers.
Always blocks of data (n
REST,
n = 0, 1, …) are transferred ‘till the Byte
Count is reached.
DRTn is deactivated with the beginning of
the last write cycle.
DMA Request Receiver
(channel A/channel B)
The receiver of ESCC2 requests a DMA
transfer by activating this line. The
request remains active as long as the
corresponding Receive FIFO requires
data transfers, thus always blocks of data
are transferred.
DRRn is deactivated immediately
following the falling edge of the last read
cycle.
SAB 82532/SAF 82532
32 bytes +
Introduction
07.96

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