SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 16

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SAF82532N10V32A

Manufacturer Part Number
SAF82532N10V32A
Description
IC CONTROLLER 2-CH SER 68-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF82532N10V32A

Controller Type
Serial Communications Controller (SCC)
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
SAF82532N10V32A
SAF82532N10V32AIN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF82532N10V32A
Manufacturer:
Infineon Technologies
Quantity:
10 000
Semiconductor Group
1.3
P-LCC-68
24
23
Pin Definitions and Functions (cont’d)
Pin No.
P-MQFP-80
56
55
Symbol
IE0
IE1
Input (I)
Output (O)
I/O
I
16
Function
Interrupt Enable 0, 1
The function depends on the selected
cascading mode:
Slave mode: IE0 and IE1 are inputs.
Interrupt acknowledge is accepted if an
interrupt signal has been generated and
the slave address provided via IE0, IE1
corresponds to the programmed value
(IPC register).
If not used, IE0 and IE1 should be tied to
GND and the slave address should be set
to ‘0’ (e.g. single device application).
Daisy Chaining mode: IE0 is output, IE1
is input.
Normally, IE1 is connected to the IE0 pin
of devices with higher priority. If not used,
IE1 has to be fixed to ‘1’.
If IE1 is reset (‘0’)
– the IE0 output is reset immediately,
– an active INT signal will be prohibited
As long as INTA input is inactive, IE1 = ‘1’
enables INT signal generation. If INT goes
active, pin IE0 immediately is set to ‘0’.
Interrupt acknowledge is accepted if the
Interrupt Enable input IE1 is active during
the following INTA cycle. During this
cycle, and additionally ‘till the end of the
second INTA cycle in Siemens/Intel bus
mode, triggering of INT signal generation
is prohibited, i.e. no interrupt will be
generated while (another) device is under
service. This is valid even for devices with
higher priority.
Pin IE0 returns to active state (logical ‘1’)
when INT is reset and IE1 input is high.
or aborted.
SAB 82532/SAF 82532
Introduction
07.96

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