SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 153

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SAF82532N10V32A

Manufacturer Part Number
SAF82532N10V32A
Description
IC CONTROLLER 2-CH SER 68-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF82532N10V32A

Controller Type
Serial Communications Controller (SCC)
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
SAF82532N10V32A
SAF82532N10V32AIN

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Part Number
Manufacturer
Quantity
Price
Part Number:
SAF82532N10V32A
Manufacturer:
Infineon Technologies
Quantity:
10 000
CSC …
XMR …
XPR …
Semiconductor Group
Clear To Send Status Change
Indicates that a state transition has occurred on CTS. The actual
state can be read from STAR register (CTS bit).
Transmit Message Repeat
The transmission of the last frame has to be repeated because
– the ESCC2 has received a negative acknowledgement to an
– a collision has occurred after at least one FIFO block of data
– CTS (transmission enable) has been withdrawn after at least
Note: For easier recovery in the case of a collision, XFIFO should
Transmit Pool Ready
A data block of up to 32 bytes can be written to the transmit FIFO.
XPR enables the fastest access to XFIFO. It has to be used for
transmission of long frames, back-to-back frames or frames with
shared flags. However, starting transmission of a new frame
should be initiated after ALLS interrupt instead of XPR
– in auto mode
– in bus configurations
– if contents of XFIFO have to be unique, e.g. for automatic
Note: It is not possible to send transparent, or I-frames when a
I-frame in auto-mode, or
has been completely transmitted, and thus an automatic
re-transmission cannot be attempted, or
one FIFO block of data has been transmitted and the frame has
not been completed.
repetition of the last frame in case of bus collisions or CTS
control (see also XMR interrupt).
not contain data of more than one frame.
The use of ALLS interrupt is therefore recommended.
XMR or XDU interrupt remains unacknowledged.
153
Detailed Register Description
SAB 82532/SAF 82532
HDLC Mode
07.96

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