SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 109

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

9.3.2
9.3.2.1 Interrupt Mode
Also 2
direction.
There are different interrupt indications concerned with the reception of data:
HDLC/SDLC
• RPF (Receive Pool Full) interrupt, indicating that a 32-byte block of data can be read
• RME (Receive Message End) interrupt, indicating that the reception of one message
In addition to the message end (RME) interrupt the following information about the
received frame is stored by the ESCC2 in special registers and/or RFIFO:
Table 8
Status Information after RME Interrupt
Length of message (bytes)
Address combination and/or
Address field
Control field
Type of frame (COMMAND/RESPONSE)
CRC result (good/bad)
Valid frame (yes/no)
ABORT sequence recognized (yes/no)
Data overflow
ASYNC, BISYNC
• RPF (Receive Pool Full) interrupt, indicating that a specified number of bytes (refer to
• TCD (Termination Character Detected) interrupt, indicating that reception has been
Additionally, the CPU can have access to contents of RFIFO without having received an
interrupt (and thereby causing TCD to occur) by issuing the RFIFO Read command
(CMDR:RFRD).
Semiconductor Group
from RFIFO and the received message is not yet complete.
is completed, i.e. either
– one message with less than 32 bytes, or the
– last part of a message with more than 32 bytes
register RFC) can be read from RFIFO.
terminated by reception of a specified character (refer to register TCR and bit
RFC:TCDE).
is stored in the RFIFO.
Data Reception
32 byte FIFO buffers (receive pools) are provided for each channel in receive
109
RBCH, RBCL
RSTA
RAL1
RHCR
RSTA
RSTA
RSTA
RSTA
RSTA
SAB 82532/SAF 82532
Operational Description
register
RFIFO: last byte
RFIFO
RFIFO
RFIFO: last byte
RFIFO: last byte
RFIFO: last byte
RFIFO: last byte
RFIFO: last byte
07.96