MCP2510-I/SO Microchip Technology, MCP2510-I/SO Datasheet - Page 8

IC CAN CONTRLER IND TEMP 18SOIC

MCP2510-I/SO

Manufacturer Part Number
MCP2510-I/SO
Description
IC CAN CONTRLER IND TEMP 18SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP2510-I/SO

Package / Case
18-SOIC (7.5mm Width)
Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
3 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
5 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP2510
sequence actively violates the bit stuffing rule. All other
stations recognize the resulting bit stuffing error and in
turn generate error frames themselves, called error
echo flags. The error flag field, therefore, consists of
between six and twelve consecutive dominant bits
(generated by one or more nodes). The error delimiter
field completes the error frame. After completion of the
error frame, bus activity returns to normal and the inter-
rupted node attempts to resend the aborted message.
If an error-passive node detects a bus error then the
node transmits an error-passive flag followed by the
error delimiter field. The error-passive flag consists of
six consecutive recessive bits, and the error frame for
an error-passive node consists of 14 recessive bits.
From this, it follows that unless the bus error is
detected by the node that is actually transmitting, the
transmission of an error frame by an error-passive
node will not affect any other node on the network. If
the transmitting node generates an error-passive flag
then this will cause other nodes to generate error
frames due to the resulting bit stuffing violation. After
transmission of an error frame, an error-passive node
must wait for six consecutive recessive bits on the bus
before attempting to rejoin bus communications.
The error delimiter consists of eight recessive bits and
allows the bus nodes to restart bus communications
cleanly after an error has occurred.
DS21291F-page 8
2.5
An Overload Frame, shown in Figure 2-5, has the
same format as an active error frame. An overload
frame, however can only be generated during an lnter-
frame space. In this way an overload frame can be dif-
ferentiated from an error frame (an error frame is sent
during the transmission of a message). The overload
frame consists of two fields, an overload flag followed
by an overload delimiter. The overload flag consists of
six dominant bits followed by overload flags generated
by other nodes (and, as for an active error flag, giving
a maximum of twelve dominant bits). The overload
delimiter consists of eight recessive bits. An overload
frame can be generated by a node as a result of two
conditions. First, the node detects a dominant bit during
the interframe space which is an illegal condition. Sec-
ond, due to internal conditions the node is not yet able
to start reception of the next message. A node may
generate a maximum of two sequential overload
frames to delay the start of the next message.
2.6
The lnterframe Space separates a preceeding frame
(of any type) from a subsequent data or remote frame.
The interframe space is composed of at least three
recessive bits called the Intermission. This is provided
to allow nodes time for internal processing before the
start of the next message frame. After the intermission,
the bus line remains in the recessive state (bus idle)
until the next transmission starts.
Overload Frame
Interframe Space
© 2007 Microchip Technology Inc.

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