MCP2510-I/SO Microchip Technology, MCP2510-I/SO Datasheet - Page 32

• Manufacturer Part Number: MCP2510-I/SO
• Description: IC CAN CONTRLER IND TEMP 18SOIC
• Manufacturer: Microchip Technology

Specifications of MCP2510-I/SO

• Package / Case: 18-SOIC (7.5mm Width)
• Controller Type: CAN Interface
• Interface: SPI
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 10mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 1
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current (max): 10 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV251001 - KIT DEVELOPMENT CAN MCP2510
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP2510
REGISTER 4-13:
REGISTER 4-14:
REGISTER 4-15:
DS21291F-page 32
bit 7-0
bit 7-0
bit 7-5
bit 4-2
bit 1-0
RXF
(ADDRESS: 03h, 07h, 0Bh, 13h, 17h, 1Bh)
RXM
(ADDRESS: 20h, 24h)
RXM
(ADDRESS: 21h, 25h)
bit 7
bit 7
bit 7
EID<7:0>: Extended Identifier Bits <7:0>
These bits hold the filter bits to be applied to the bits <7:0> of the Extended Identifier portion of
a received message
Legend:
R = Readable bit
-n = Value at POR
SID<10:3>: Standard Identifier Mask Bits <10:3>
These bits hold the mask bits to be applied to bits <10:3> of the Standard Identifier portion of a
received message
Legend:
R = Readable bit
-n = Value at POR
SID<2:0>: Standard Identifier Mask Bits <2:0>
These bits hold the mask bits to be applied to bits<2:0> of the Standard Identifier portion of a
received message
Unimplemented: Reads as '0'
EID<17:16>: Extended Identifier Mask Bits <17:16>
These bits hold the mask bits to be applied to bits <17:16> of the Extended Identifier portion of
a received message
Legend:
R = Readable bit
-n = Value at POR
R/W-x
R/W-x
SID10
R/W-x
EID7
SID2
N
N
N
EID0 - ACCEPTANCE FILTER
SIDH - ACCEPTANCE FILTER MASK
SIDL - ACCEPTANCE FILTER MASK
R/W-x
R/W-x
R/W-x
EID6
SID1
SID9
R/W-x
R/W-x
R/W-x
EID5
SID8
SID0
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
R/W-x
R/W-x
EID4
SID7
U-0
—
N
EXTENDED IDENTIFIER LOW
R/W-x
R/W-x
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
N
EID3
SID6
N
U-0
—
STANDARD IDENTIFIER LOW
STANDARD IDENTIFIER HIGH
R/W-x
R/W-x
EID2
SID5
U-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-x
EID17
EID1
SID4
R/W-x
R/W-x
R/W-x
EID16
EID0
SID3
bit 0
bit 0
bit 0