MCP2510-ISOG Microchip Technology, MCP2510-ISOG Datasheet
MCP2510-ISOG
Related parts for MCP2510-ISOG
MCP2510-ISOG Summary of contents
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... Microchip Technology Inc. MCP2510 ™ Interface Description The Microchip Technology Inc. MCP2510 is a Full Con- troller Area Network (CAN) protocol controller imple- menting CAN specification V2.0 A/B. It supports CAN 1.2, CAN 2.0A, CAN 2.0B Passive, and CAN 2.0B Active versions of the protocol, and is capable of trans- mitting and receiving standard and extended mes- sages ...
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... MCP2510 Table of Contents 1.0 Device Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.0 Can Message Frames 3.0 Message Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.0 Message Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.0 Bit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.0 Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 7.0 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 8.0 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.0 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 10.0 Register Map 11.0 SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 12.0 Electrical Characteristics 13.0 Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 On-Line Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Reader Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Product Identification System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Worldwide Sales and Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please check our Worldwide Web site at: http://www ...
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... Overview The MCP2510 is a stand-alone CAN controller devel- oped to simplify applications that require interfacing with a CAN bus. A simple block diagram of the MCP2510 is shown in Figure 1-1. The device consists of three main blocks: 1. The CAN protocol engine. 2. The control logic and SRAM registers that are used to configure the device and its operation ...
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... Controller MCP2510 CAN Transceiver CAN CAN Transceiver Transceiver MCP2510 MCP2510 Node Node Controller Controller Description Transmit output pin to CAN bus Receive input pin from CAN bus Clock output pin with programmable prescaler Transmit buffer TXB0 request to send or general purpose digital input. 100 k ...
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... Transmit/Receive Buffers The MCP2510 has three transmit and two receive buffers, two acceptance masks (one for each receive buffer), and a total of six acceptance filters. Figure 1 block diagram of these buffers and their connection to the protocol engine. FIGURE 1-3: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM ...
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... MCP2510 1.3 CAN Protocol Engine The CAN protocol engine combines several functional blocks, shown in Figure 1-4. These blocks and their functions are described below. 1.4 Protocol Finite State Machine The heart of the engine is the Finite State Machine (FSM). This state machine sequences through mes- sages on a bit by bit basis, changing states as the fields of the various frame types are transmitted or received ...
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... CAN MESSAGE FRAMES The MCP2510 supports Standard Data Frames, Extended Data Frames, and Remote Frames (Stan- dard and Extended) as defined in the CAN 2.0B speci- fication. 2.1 Standard Data Frame The CAN Standard Data Frame is shown in Figure 2-1. In common with all other frames, the frame begins with a Start Of Frame (SOF) bit, which is of the dominant state, which allows hard synchronization of all nodes ...
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... MCP2510 sequence actively violates the bit stuffing rule. All other stations recognize the resulting bit stuffing error and in turn generate error frames themselves, called error echo flags. The error flag field, therefore, consists of between six and twelve consecutive dominant bits (generated by one or more nodes). The error delimiter field completes the error frame ...
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FIGURE 2-1: STANDARD DATA FRAME 12 6 Arbitration Field Control Field Identifier Data Length Code Message Filtering Stored in Buffers Data Frame (number of bits = Data ...
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FIGURE 2-2: EXTENDED DATA FRAME 32 Arbitration Field Identifier Extended Identifier Message Filtering Stored in Buffers Data Frame (number of bits = Control Data Field Field 8 ...
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FIGURE 2-3: REMOTE DATA FRAME 32 Arbitration Field Identifier Message Filtering Remote Data Frame with Extended Identifier 6 Control Field Data Extended Identifier Length Code 16 7 CRC Field End of ...
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FIGURE 2-4: ERROR DATA FRAME Interrupted Data Frame 12 6 Arbitration Field Control Field Identifier Data Length Code Message Filtering Bit Stuffing Data Field Data Frame or ...
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FIGURE 2-5: OVERLOAD FRAME Remote Frame (number of bits = 44 Arbitration Field Control Field CRC Field End of Frame 15 CRC ...
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... MCP2510 NOTES: DS21291E-page 14 2002 Microchip Technology Inc. ...
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... Configuration and control of these pins is accomplished using the TXRTSCTRL register (see Register 3-2). The TXRTSCTRL register can only be modified when the MCP2510 is in configuration mode (see Section 9.0). If configured to operate as a request to send pin, the pin is mapped into the respective TXB for the transmit buffer. The TXREQ bit is latched by the ...
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... MCP2510 Only messages that have not already begun to be transmitted can be aborted. Once a message has begun transmission, it will not be possible for the user to reset the TXBnCTRL.TXREQ bit. After transmission FIGURE 3-1: TRANSMIT MESSAGE FLOWCHART Are any No TXBnCTRL.TXREQ bits = 1 Clear: TXBnCTRL.ABTF TXBnCTRL.MLOA TXBnCTRL.TXERR ...
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... Lowest Message Priority Legend Readable bit -n = Value at POR 2002 Microchip Technology Inc. Control Register N R-0 R-0 R-0 R/W-0 MLOA TXERR TXREQ W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 U-0 R/W-0 R/W-0 — TXP1 TXP0 bit Bit is unknown DS21291E-page 17 ...
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... MCP2510 REGISTER 3-2: TXRTSCTRL - TX (ADDRESS: 0Dh) U-0 — bit 7 bit 7 Unimplemented: Read as '0' bit 6 Unimplemented: Read as '0' bit 5 B2RTS: TX2RTS Pin State - Reads state of TX2RTS pin when in digital input mode - Reads as ‘0’ when pin is in ‘request to send’ mode bit 4 B1RTS: TX1RTX Pin State - Reads state of TX1RTS pin when in digital input mode - Reads as ‘ ...
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... Bit is set ’0’ = Bit is cleared EXTENDED IDENTIFIER LOW N R/W-x R/W-x R/W-x R/W-x EID5 EID4 EID3 EID2 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R/W-x R/W-x EID17 EID16 bit Bit is unknown R/W-x R/W-x EID9 EID8 bit Bit is unknown R/W-x R/W-x EID1 ...
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... MCP2510 REGISTER 3-7: TXB DLC - Transmit Buffer N (ADDRESS: 35h, 45h, 55h) R/W-x R/W-x — bit 7 bit 7 Unimplemented: Reads as '0’ bit 6 RTR: Remote Transmission Request Bit 1 = Transmitted Message will be a Remote Transmit Request 0 = Transmitted Message will be a Data Frame bit 5-4 Unimplemented: Reads as '0’ ...
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... MESSAGE RECEPTION 4.1 Receive Message Buffering The MCP2510 includes two full receive buffers with multiple acceptance filters for each. There is also a separate Message Assembly Buffer (MAB) which acts as a third receive buffer (see Figure 4-1). 4.2 Receive Buffers Of the three Receive Buffers, the MAB is always com- mitted to receiving the next message from the bus ...
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... MCP2510 FIGURE 4-1: RECEIVE BUFFER BLOCK DIAGRAM Acceptance Mask RXM0 Acceptance Filter RXF0 Acceptance Filter e RXF1 Identifier Data Field DS21291E-page 22 Acceptance Mask RXM1 Acceptance Filter RXF2 Acceptance Filter RXF3 Acceptance Filter RXF4 Acceptance Filter RXF5 M Identifier A B Data Field 2002 Microchip Technology Inc ...
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... Yes Go to Start Generate Interrupt on INT RXB1 RXB0 Set CANSTAT <3:0> accord- ing to which receive buffer the message was loaded into Set RXBF1 Pin = 0 MCP2510 Is No CANINTF.RX1IF = 0 ? Yes Move message into RXB1 Set CANINTF.RX1IF=1 Set RXB0CTRL.FILHIT <2:0> according to which filter criteria was met Yes CANINTE ...
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... BUKT: Rollover Enable 1 = RXB0 message will rollover and be written to RXB1 if RXB0 is full 0 = Rollover disabled bit 1 BUKT1: Read Only Copy of BUKT Bit (used internally by the MCP2510). bit 0 FILHIT<0>: Filter Hit - indicates which acceptance filter enabled reception of message 1 = Acceptance Filter 1 (RXF1 Acceptance Filter 0 (RXF0) ...
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... Acceptance Filter 0 (RXF0) (Only if BUKT bit set in RXB0CTRL) Legend Readable bit -n = Value at POR 2002 Microchip Technology Inc. R/W-0 U-0 R-0 R-0 RXM0 — RXRTR FILHIT2 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R-0 R-0 FILHIT1 FILHIT0 bit Bit is unknown DS21291E-page 25 ...
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... MCP2510 REGISTER 4-3: BFPCTRL - RX (ADDRESS: 0Ch) U-0 — bit 7 bit 7 Unimplemented: Read as '0' bit 6 Unimplemented: Read as '0' bit 5 B1BFS: RX1BF Pin State (digital output mode only) - Reads as ‘0’ when RX1BF is configured as interrupt pin bit 4 B0BFS: RX0BF Pin State (digital output mode only) - Reads as ‘ ...
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... U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R-x R-x R-x R-x EID13 EID12 EID11 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 U-0 R-x R-x — EID17 EID16 bit Bit is unknown R-x R-x R-x EID10 EID9 ...
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... MCP2510 REGISTER 4-7: RXBNEID0 - RECEIVE BUFFER (ADDRESS: 64h, 74h) R-x EID7 EID6 bit 7 bit 7-0 EID<7:0>: Extended Identifier Bits <7:0> These bits hold the least significant eight bits of the Extended Identifier for the received mes- sage Legend Readable bit -n = Value at POR REGISTER 4-8: RXBNDLC - RECEIVE BUFFER ...
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... Accept tance filters with a lower number filter having higher pri- Accept ority. Messages are compared to filters in ascending order of filter number. Reject The mask and filter registers can only be modified Reject when the MCP2510 is in configuration mode (see Accept Section 9.0). MCP2510 DS21291E-page 29 ...
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... MCP2510 FIGURE 4-3: MESSAGE ACCEPTANCE MASK AND FILTER OPERATION Acceptance Filter Register RXFn0 RXFn1 RXFnn Message Assembly Buffer Identifier REGISTER 4-10: RXF SIDH - ACCEPTANCE FILTER N (ADDRESS: 00h, 04h, 08h, 10h, 14h, 18h) R/W-x R/W-x SID10 SID9 bit 7 bit 7-0 SID<10:3>: Standard Identifier Filter Bits <10:3> These bits hold the filter bits to be applied to bits <10:3> of the Standard Identifier portion of a ...
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... Bit is set ’0’ = Bit is cleared EXTENDED IDENTIFIER HIGH N R/W-x R/W-x R/W-x R/W-x EID13 EID12 EID11 EID10 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R/W-x R/W-x EID17 EID16 bit Bit is unknown R/W-x R/W-x EID9 EID8 bit Bit is unknown DS21291E-page 31 ...
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... MCP2510 REGISTER 4-13: RXF EID0 - ACCEPTANCE FILTER N (ADDRESS: 03h, 07h, 0Bh, 13h, 17h, 1Bh) R/W-x R/W-x EID7 EID6 bit 7 bit 7-0 EID<7:0>: Extended Identifier Bits <7:0> These bits hold the filter bits to be applied to the bits <7:0> of the Extended Identifier portion of a received message Legend Readable bit ...
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... Bit is set ’0’ = Bit is cleared EXTENDED IDENTIFIER LOW N R/W-x R/W-x R/W-x R/W-x EID5 EID4 EID3 EID2 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R/W-x R/W-x EID9 EID8 bit Bit is unknown R/W-x R/W-x EID1 EID0 bit Bit is unknown DS21291E-page 33 ...
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... MCP2510 NOTES: DS21291E-page 34 2002 Microchip Technology Inc. ...
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... Digital Phase Lock Loop (DPLL) synchronization. The bit timing of the MCP2510 is implemented using a DPLL that is configured to synchronize to the incoming data, and provide the nominal timing for the transmitted data ...
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... The CAN spec- by setting the Q ification defines this time to be less than or equal to 2 CNF2 register T . The MCP2510 defines this time phase segment 2 must be at least 2 T BUS (depends COMP (depends on DRIVE ...
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... Q Phase SJW Segment 1 Sample Point MCP2510 . The Q as follows: Q Phase Segment 2 Actual Bit Nominal Length Bit Length ...
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... MCP2510 FIGURE 5-3: SHORTENING A BIT PERIOD Input Signal Prop Sync Segment T Q 5.8 Programming Time Segments Some requirements for programming of the time seg- ments: • Prop Seg + Phase Seg 1 >= Phase Seg 2 • Prop Seg + Phase Seg 1 >= T DELAY • Phase Seg 2 > Sync Jump Width ...
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... Bit Timing Configuration Registers The configuration registers (CNF1, CNF2, CNF3) con- trol the bit timing for the CAN bus interface. These reg- isters can only be modified when the MCP2510 is in configuration mode (see Section 9.0). 5.10.1 CNF1 The BRP<5:0> bits control the baud rate prescaler. ...
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... MCP2510 REGISTER 5-2: CNF2 - CONFIGURATION REGISTER2 (ADDRESS: 29h) R/W-0 R/W-0 BTLMODE SAM bit 7 bit 7 BTLMODE: Phase Segment 2 Bit Time Length 1 = Length of Phase Seg 2 determined by PHSEG22:PHSEG20 bits of CNF3 0 = Length of Phase Seg 2 is the greater of Phase Seg 1 and IPT (2T bit 6 SAM: Sample Point Configuration 1 = Bus line is sampled three times at the sample point ...
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... MCU, if the bus remains idle for 128 X 11 bit times. If this is not desired, the error inter- rupt service routine should address this. The current error mode of the MCP2510 can be read by the MCU via the EFLG register (Register 6-3). Additionally, there is an error state warning flag bit, ...
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... MCP2510 FIGURE 6-1: ERROR MODES STATE DIAGRAM REC > 127 or TEC > 127 Error-Passive REGISTER 6-1: TEC - TRANSMITTER ERROR COUNTER (ADDRESS: 1Ch) R-0 TEC7 TEC6 bit 7 bit 7-0 TEC<7:0>: Transmit Error Count Legend Readable bit -n = Value at POR REGISTER 6-2: REC - RECEIVER ERROR COUNTER (ADDRESS: 1Dh) R-0 REC7 REC6 bit 7 bit 7-0 REC< ...
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... Reset when both REC and TEC are less than 96 - Legend Readable bit -n = Value at POR 2002 Microchip Technology Inc. R-0 R-0 R-0 R-0 TXBO TXEP RXEP TXWAR W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R-0 R-0 RXWAR EWARN bit Bit is unknown DS21291E-page 43 ...
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... MCP2510 NOTES: DS21291E-page 44 2002 Microchip Technology Inc. ...
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... Bus Activity Wakeup Interrupt When the MCP2510 is in sleep mode and the bus activ- ity wakeup interrupt is enabled (CANINTE.WAKIE = 1), an interrupt will be generated on the INT pin, and the CANINTF.WAKIF bit will be set when activity is detected on the CAN bus ...
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... MCP2510 7.6 Error Interrupt When the error interrupt is enabled (CANINTE.ERRIE = 1) an interrupt is generated on the INT pin if an over- flow condition occurs or if the error state of transmitter or receiver has changed. The Error Flag Register (EFLG) will indicate one of the following conditions. 7.6.1 RECEIVER OVERFLOW ...
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... Interrupt when message received in RXB0 0 = Disabled Legend Readable bit -n = Value at POR 2002 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 R/W-0 ERRIE TX2IE TX1IE TX0IE W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R/W-0 R/W-0 RX1IE RX0IE bit Bit is unknown DS21291E-page 47 ...
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... MCP2510 REGISTER 7-2: CANINTF - INTERRUPT FLAG REGISTER (ADDRESS: 2Ch) R/W-0 R/W-0 MERRF WAKIF bit 7 bit 7 MERRF: Message Error Interrupt Flag 1 = Interrupt pending (must be cleared by MCU to reset interrupt condition interrupt pending bit 6 WAKIF: Wakeup Interrupt Flag 1 = Interrupt pending (must be cleared by MCU to reset interrupt condition) ...
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... Use of a series cut crys- tal may give a frequency out of the crystal manufactur- ers specifications. A typical oscillator circuit is shown in Figure 8-1. The MCP2510 may also be driven by an external clock source connected to the OSC1 pin as shown in Figure 8-2 and Figure 8-3. ...
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... MCP2510 FIGURE 8-3: EXTERNAL SERIES RESONANT CRYSTAL OSCILLATOR CIRCUIT 330 k 74AS04 Note 1: Duty cycle restrictions must be observed (see Table 12-2). DS21291E-page 50 330 k 74AS04 74AS04 0.1 mF XTAL To Other Devices MCP2510 OSC1 2002 Microchip Technology Inc. ...
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... This is done so the MCU can also 2002 Microchip Technology Inc. MCP2510 be placed into a sleep mode and use the MCP2510 to wake it up upon detecting activity on the bus. Note: Care must be exercised to not enter sleep mode while the MCP2510 is transmitting a message ...
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... Normal Mode This is the standard operating mode of the MCP2510. In this mode the device actively monitors all bus mes- sages and generates acknowledge bits, error frames, etc. This is also the only mode in which the MCP2510 will transmit messages over the CAN bus. R/W-1 R/W-0 ...
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... RXB1 Interrupt bit 0 Unimplemented: Read as '0' Legend Readable bit -n = Value at POR 2002 Microchip Technology Inc. R-0 R-0 U-0 R-0 — ICOD2 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP2510 R-0 R-0 U-0 ICOD1 ICOD0 — bit Bit is unknown DS21291E-page 53 ...
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... MCP2510 NOTES: DS21291E-page 54 2002 Microchip Technology Inc. ...
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... REGISTER MAP The register map for the MCP2510 is shown in Table 10-1. Address locations for each register are determined by using the column (higher order 4 bits) and row (lower order 4 bits) values. The registers have been arranged to optimize the sequential reading and TABLE 10-1: CAN CONTROLLER REGISTER MAP ...
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... MCP2510 NOTES: DS21291E-page 56 2002 Microchip Technology Inc. ...
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... Mode 0,0 and Mode 1,1. Commands and data are sent to the device via the SI pin, with data being clocked in on the rising edge of SCK. Data is driven out by the MCP2510, on the SO line, on the falling edge of SCK. The CS pin must be held low while any operation is performed. Table 11-1 shows the instruction bytes for all operations ...
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... MCP2510 FIGURE 11-1: BIT MODIFY Mask byte Data byte Previous Register Contents Resulting Register Contents TABLE 11-1: SPI INSTRUCTION SET Instruction Name Instruction Format RESET 1100 0000 READ 0000 0011 WRITE ...
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... high impedance don’t care 0 data out MCP2510 data byte repeat data out CANINTF.RX0IF CANINTF.RX1IF TXB0CNTRL.TXREQ CANINTF ...
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... MCP2510 FIGURE 11-7: RESET INSTRUCTION CS SCK SI SO FIGURE 11-8: SPI INPUT TIMING CS 1 Mode 1,1 SCK Mode 0 MSB in SO FIGURE 11-9: SPI OUTPUT TIMING SCK 12 SO MSB out SI DS21291E-page instruction high impedance 6 7 high impedance 13 don’ ...
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... Exposure to maximum rating conditions for extended peri- ods may affect device reliability. 2002 Microchip Technology Inc. MCP2510 +1. ...
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... MCP2510 TABLE 12-1: DC CHARACTERISTICS DC Characteristics Param. No. Sym Characteristic V Supply Voltage DD V Register Retention Voltage RET High Level Input Voltage V RXCAN IH SCK, CS, SI, TXnRTS Pins OSC1 RESET Low Level Input Voltage V RXCAN,TXnRTS Pins IL SCK, CS, SI OSC1 RESET Low Level Output Voltage V TXCAN OL RXnBF Pins ...
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... Min Max Units 15 — (Note) OSC 15 — (Note) OSC — Measured from 0.3 V (Note) — Measured from 0.7 V (Note) — 100 ns MCP2510 V = 3. 4.5V to 5.5V DD Conditions + T ) OSH OSL V = 3. 4.5V to 5.5V DD Conditions V = 3. 4.5V to 5.5V DD Conditions to 0 ...
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... MCP2510 TABLE 12-5: SPI INTERFACE AC CHARACTERISTICS SPI Interface AC Characteristics Param. Sym Characteristic No. F Clock Frequency CLK Setup Time CSS Hold Time CSH Disable Time CSD 4 T Data Setup Time Data Hold Time CLK Rise Time CLK Fall Time ...
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... Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). 2002 Microchip Technology Inc. MCP2510 Example: MCP2510-I/P XXXXXXXXXXXXXXXXX YYWWNNN Example: MCP2510-I/SO XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN Example: MCP2510 I/STNNN YYWW DS21291E-page 65 ...
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... MCP2510 18-Lead Plastic Dual In-line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width ...
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... A2 .088 .091 .094 A1 .004 .008 .012 E .394 .407 .420 E1 .291 .295 .299 D .446 .454 .462 h .010 .020 .029 L .016 .033 .050 .009 .011 .012 B .014 .017 .020 MCP2510 A2 MILLIMETERS MIN NOM MAX 18 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.39 7.49 7.59 11.33 11.53 11.73 0.25 0.50 0.74 0.41 0.84 1. 0.23 0.27 0.30 0.36 0.42 0. ...
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... MCP2510 20-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... RXFnEID8 - Acceptance Filter n Extended Identifier Mid RXFnSIDH - Acceptance Filter n Standard Identifier High 30 RXFnSIDL - Acceptance Filter n Standard Identifier Low RXMnEID0 - Acceptance Filter Mask n Extended Identifier Low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 RXMnEID8 - Acceptance Filter Mask n Extended Identifier Mid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 RXMnSIDH - Acceptance Filter Mask n Standard Identifier High . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MCP2510 , DS21291E-page 69 ...
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... MCP2510 RXMnSIDL - Acceptance Filter Mask n Standard Identifier Low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 S Sample Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Shortening a Bit Period . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 SPI Interface Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 SPI Port AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 64 Standard Data Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Stuff Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Synchronization Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Synchronization Segment . . . . . . . . . . . . . . . . . . . . . . . . . 36 T TEC - Transmitter Error Count . . . . . . . . . . . . . . . . . . . . . . 42 Time Quanta . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Transmit Interrupt ...
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... Conferences for products, Development Systems, technical information and more • Listing of seminars and events 2002 Microchip Technology Inc. MCP2510 Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: MCP2510 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...
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... Examples: a) MCP2510 -E/P: Extended temperature, PDIP package. b) MCP2510 -I/P: Industrial temperature, PDIP package. c) MCP2510 -E/SO: Extended temperature, SOIC package. d) MCP2510 -I/SO: Industrial temperature, SOIC package. e) MCP2510 -I/SO: Tape and Reel, Industrial temperature, SOIC package. f) MCP2510 I/ST: Industrial temperature, TSSOP package. g) MCP2510 T-I/ST: Tape and Reel, Industrial temperature, TSSOP package. ...
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... MCP2510 NOTES: DS21291E-page 74 2002 Microchip Technology Inc. ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 ...
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... Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...