MCP2510-I/SO Microchip Technology, MCP2510-I/SO Datasheet - Page 36

• Manufacturer Part Number: MCP2510-I/SO
• Description: IC CAN CONTRLER IND TEMP 18SOIC
• Manufacturer: Microchip Technology

Specifications of MCP2510-I/SO

• Package / Case: 18-SOIC (7.5mm Width)
• Controller Type: CAN Interface
• Interface: SPI
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 10mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 1
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current (max): 10 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV251001 - KIT DEVELOPMENT CAN MCP2510
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP2510
5.1
The Time Quanta (T
from the oscillator period. There is a programmable
baud-rate prescaler, with integral values ranging from 1
to 64, in addition to a fixed divide by two for clock gen-
eration.
Time quanta is defined as:
where Baud Rate is the binary value represented by
CNF1.BRP<5:0>
For some examples:
If F
Time = 8 T
If F
Time = 8 T
If F
Time = 25 T
The frequencies of the oscillators in the different nodes
must be coordinated in order to provide a system-wide
specified nominal bit time. This means that all oscilla-
tors must have a T
should also be noted that although the number of T
programmable from 4 to 25, the usable minimum is 6
T
is not guaranteed to operate correctly
5.2
This part of the bit time is used to synchronize the var-
ious CAN nodes on the bus. The edge of the input sig-
nal is expected to occur during the sync segment. The
duration is 1 T
5.3
This part of the bit time is used to compensate for phys-
ical delay times within the network. These delay times
consist of the signal propagation time on the bus line
and the internal delay time of the nodes. The delay is
calculated as being the round trip time from transmitter
to receiver (twice the signal's propagation time on the
bus line), the input comparator delay, and the output
driver delay. The length of the Propagation Segment
can be programmed from 1 T
PRSEG2:PRSEG0
(Register 5-2).
DS21291F-page 36
Q .
then T
then T
then T
OSC
OSC
OSC
Attempting to a bit time of less than 6 T
= 16 MHz, BRP<5:0> = 00h, and Nominal Bit
= 20 MHz, BRP<5:0> = 01h, and Nominal Bit
= 25 MHz, BRP<5:0> = 3Fh, and Nominal Bit
Q
Q
Q
Time Quanta
Synchronization Segment
Propagation Segment
= 200 nsec and Nominal Bit Rate = 625 Kb/s
= 125 nsec and Nominal Bit Rate = 1 Mb/s
= 5.12 µsec and Nominal Bit Rate = 7.8 Kb/s
Q
Q
T
Q
;
;
Q
;
Q
=
.
2* Baud Rate + 1
OSC
(
Q
bits
) is a fixed unit of time derived
that is a integral divisor of T
of
Q
to 8 T
the
)*T
Q
CNF2
OSC
by setting the
Q
in length
register
Q
Q
. It
is
The total delay is calculated from the following individ-
ual delays:
5.4
The Phase Buffer Segments are used to optimally
locate the sampling point of the received bit within the
nominal bit time. The sampling point occurs between
phase segment 1 and phase segment 2. These seg-
ments can be lengthened or shortened by the resyn-
chronization process (see Section 5.7.2). Thus, the
variation of the values of the phase buffer segments
represent the DPLL functionality. The end of phase
segment 1 determines the sampling point within a bit
time. phase segment 1 is programmable from 1 T
T
the next transmitted data transition and is also pro-
grammable from 1 T
to IPT requirements the actual minimum length of
phase segment 2 is 2 T
may be defined to be equal to the greater of phase seg-
ment 1 or the Information Processing Time (IPT). (see
Section 5.6).
5.5
The Sample Point is the point of time at which the bus
level is read and value of the received bit is determined.
The Sampling point occurs at the end of phase seg-
ment 1. If the bit timing is slow and contains many T
it is possible to specify multiple sampling of the bus line
at the sample point. The value of the received bit is
determined to be the value of the majority decision of
three values. The three samples are taken at the sam-
ple point, and twice before with a time of T
each sample.
5.6
The Information Processing Time (IPT) is the time seg-
ment, starting at the sample point, that is reserved for
calculation of the subsequent bit level. The CAN spec-
ification defines this time to be less than or equal to 2
T
phase segment 2 must be at least 2 T
Q
Q
- 2 * physical bus end to end delay; T
- 2 * input comparator delay; T
- 2 * output driver delay; T
- 1 * input to output of CAN controller; T
- T
- Prop_Seg = T
. The MCP2510 defines this time to be 2 T
in duration. Phase segment 2 provides delay before
on application circuit)
application circuit)
(maximum defined as 1 T
T
PROPOGATION
DRIVE
Phase Buffer Segments
Sample Point
Information Processing Time
) + T
CAN
PROPOGATION
= 2 * (T
Q
to 8 T
Q
© 2007 Microchip Technology Inc.
- see Section 5.6 below), or it
BUS
Q
DRIVE
in duration (however due
Q
+ T
+ delay ns)
/ T
COMP
COMP
Q
(depends on
Q
(depends
long.
BUS
+
Q
CAN
/2
between
Q
. Thus,
Q
to 8
Q
,